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authorArne Georg Gleditsch <arne.gleditsch@numscale.com>2010-09-09 09:56:19 +0000
committerPatrick Georgi <patrick.georgi@coresystems.de>2010-09-09 09:56:19 +0000
commit6556534bab10fdd485f3c803321751b6eb9626ce (patch)
tree7d872a8f7734e1aa4f11d9fb076f79d5df240a4d
parent9c35c8409db16cd88dd93266575766f8a1695a27 (diff)
Apparently, it's not crucial to clear this at the exact moment we switch
to using ram, so something like the appended is perhaps more appropriate. Confirmed to work on hw. Signed-off-by: Arne Georg Gleditsch <arne.gleditsch@numscale.com> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5791 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
-rw-r--r--src/cpu/amd/model_10xxx/model_10xxx_init.c5
-rw-r--r--src/northbridge/amd/amdmct/mct/mct_d.c2
2 files changed, 6 insertions, 1 deletions
diff --git a/src/cpu/amd/model_10xxx/model_10xxx_init.c b/src/cpu/amd/model_10xxx/model_10xxx_init.c
index 992c957913..6f61fc37fd 100644
--- a/src/cpu/amd/model_10xxx/model_10xxx_init.c
+++ b/src/cpu/amd/model_10xxx/model_10xxx_init.c
@@ -113,6 +113,11 @@ static void model_10xxx_init(device_t dev)
msr.hi &= ~(1 << (46 - 32));
wrmsr(NB_CFG_MSR, msr);
+ /* Clear ClLinesToNbDis */
+ msr = rdmsr(BU_CFG2_MSR);
+ msr.lo &= ~(1 << 15);
+ wrmsr(BU_CFG2_MSR, msr);
+
/* Write protect SMM space with SMMLOCK. */
msr = rdmsr(HWCR_MSR);
msr.lo |= (1 << 0);
diff --git a/src/northbridge/amd/amdmct/mct/mct_d.c b/src/northbridge/amd/amdmct/mct/mct_d.c
index afeb4e98d2..c571b2349d 100644
--- a/src/northbridge/amd/amdmct/mct/mct_d.c
+++ b/src/northbridge/amd/amdmct/mct/mct_d.c
@@ -3189,7 +3189,7 @@ static void mct_FinalMCT_D(struct MCTStatStruc *pMCTstat,
print_t("\tmct_FinalMCT_D: Clr Cl, Wb\n");
- mct_ClrClToNB_D(pMCTstat, pDCTstat);
+ /* ClrClToNB_D postponed til we're done executing from ROM */
mct_ClrWbEnhWsbDis_D(pMCTstat, pDCTstat);
}