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authorFelix Held <felix-coreboot@felixheld.de>2021-02-12 23:19:30 +0100
committerFelix Held <felix-coreboot@felixheld.de>2021-02-14 18:22:49 +0000
commit65418cc8b5ad3c163e283b342d27e787061deee3 (patch)
tree1362c49e94314b3784c33a3a068c7d8300cfce75
parentffdf840dbba3223edbb275e007cf9d748f976b25 (diff)
soc/amd/cezanne: move CPU cluster to chipset device tree
This will be common for all boards, so move it to the chipset device tree. TEST=CPU cluster and LAPIC still show up in console logs. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Ia49e7b4cfc09c60b6152b8ccc47f37b6adc1e319 Reviewed-on: https://review.coreboot.org/c/coreboot/+/50613 Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/mainboard/amd/majolica/devicetree.cb3
-rw-r--r--src/soc/amd/cezanne/chipset.cb3
2 files changed, 3 insertions, 3 deletions
diff --git a/src/mainboard/amd/majolica/devicetree.cb b/src/mainboard/amd/majolica/devicetree.cb
index 24799803ec..a1415525c7 100644
--- a/src/mainboard/amd/majolica/devicetree.cb
+++ b/src/mainboard/amd/majolica/devicetree.cb
@@ -2,9 +2,6 @@
chip soc/amd/cezanne
- device cpu_cluster 0 on
- device lapic 0 on end
- end
device domain 0 on
end
diff --git a/src/soc/amd/cezanne/chipset.cb b/src/soc/amd/cezanne/chipset.cb
index 49bd0c8b18..f4d5ccc782 100644
--- a/src/soc/amd/cezanne/chipset.cb
+++ b/src/soc/amd/cezanne/chipset.cb
@@ -1,4 +1,7 @@
chip soc/amd/cezanne
+ device cpu_cluster 0 on
+ device lapic 0 on end
+ end
device domain 0 on
device pci 00.0 alias gnb on end
end