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| author | Stefan Reinauer <reinauer@chromium.org> | 2012-07-24 14:53:15 -0700 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2012-07-25 23:42:48 +0200 |
| commit | 62f1ad98c42f18308cda9351a427bb7af8d7dbca (patch) | |
| tree | 147a600a436bcfe0379fc6b6b9f475343d166f60 | |
| parent | 54cba3b4ad743340de7462e0e5dcec76ee73baed (diff) | |
SMM: Fix state table for Intel Core2 CPUs
When fixing the SMM state table for SandyBridge/IvyBridge CPUs
the wrong table was used for older 64bit capable CPUs.
Change-Id: Ia7dff21aa3f0e5aa61575634fc839777de6bef10
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/1353
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
| -rw-r--r-- | src/cpu/x86/smm/smihandler.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/cpu/x86/smm/smihandler.c b/src/cpu/x86/smm/smihandler.c index 83ebaf9100..10f38f9690 100644 --- a/src/cpu/x86/smm/smihandler.c +++ b/src/cpu/x86/smm/smihandler.c @@ -158,6 +158,7 @@ void smi_handler(u32 smm_revision) state_save.type = EM64T; state_save.em64t_state_save = (em64t_smm_state_save_area_t *) (smm_base + 0x7d00 - (node * 0x400)); + break; case 0x00030101: /* SandyBridge/IvyBridge */ state_save.type = EM64T101; state_save.em64t101_state_save = |