diff options
author | Subrata Banik <subratabanik@google.com> | 2022-04-14 14:30:38 +0530 |
---|---|---|
committer | Subrata Banik <subratabanik@google.com> | 2022-04-23 17:17:16 +0000 |
commit | 5530316024f5429ff9b6611e8abb1eaceefb7a45 (patch) | |
tree | 99584ea0aa04f1ee67d38433be25877e984a25c6 | |
parent | 4c6072130c0979095a6639af4c5c06937f785145 (diff) |
soc/intel/{skl, xeon_sp}: Drop SoC specific LPC lock down configuration
This patch drops SoC specific lpc lock down configuration as commit
63630 (soc/intel/cmn/pch/lockdown: Implement LPC lock down
configuration) implements the lpc registers lock down configuration in
common code.
BUG=b:211954778
TEST=Build.
Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I99ec6d63dfe9a8ac8d9846067a9afc3ef83dc1c2
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63631
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
-rw-r--r-- | src/soc/intel/skylake/lockdown.c | 13 | ||||
-rw-r--r-- | src/soc/intel/xeon_sp/lockdown.c | 11 |
2 files changed, 0 insertions, 24 deletions
diff --git a/src/soc/intel/skylake/lockdown.c b/src/soc/intel/skylake/lockdown.c index 2fa53c92b3..1dd4e564d0 100644 --- a/src/soc/intel/skylake/lockdown.c +++ b/src/soc/intel/skylake/lockdown.c @@ -2,20 +2,10 @@ #include <device/mmio.h> #include <intelblocks/cfg.h> -#include <intelblocks/lpc_lib.h> #include <intelblocks/pmclib.h> #include <intelpch/lockdown.h> #include <soc/pm.h> -static void lpc_lockdown_config(int chipset_lockdown) -{ - /* Set BIOS Interface Lock, BIOS Lock */ - if (chipset_lockdown == CHIPSET_LOCKDOWN_COREBOOT) { - lpc_set_bios_interface_lock_down(); - lpc_set_lock_enable(); - } -} - static void pmc_lockdown_config(void) { uint8_t *pmcbase; @@ -33,9 +23,6 @@ static void pmc_lockdown_config(void) void soc_lockdown_config(int chipset_lockdown) { - /* LPC lock down configuration */ - lpc_lockdown_config(chipset_lockdown); - /* PMC lock down configuration */ pmc_lockdown_config(); } diff --git a/src/soc/intel/xeon_sp/lockdown.c b/src/soc/intel/xeon_sp/lockdown.c index 0f032fc755..49f3f5a0ee 100644 --- a/src/soc/intel/xeon_sp/lockdown.c +++ b/src/soc/intel/xeon_sp/lockdown.c @@ -3,21 +3,11 @@ #include <device/mmio.h> #include <device/pci.h> #include <intelblocks/cfg.h> -#include <intelblocks/lpc_lib.h> #include <intelblocks/pmclib.h> #include <intelpch/lockdown.h> #include <soc/pci_devs.h> #include <soc/pm.h> -static void lpc_lockdown_config(int chipset_lockdown) -{ - /* Set BIOS Interface Lock, BIOS Lock */ - if (chipset_lockdown == CHIPSET_LOCKDOWN_COREBOOT) { - lpc_set_bios_interface_lock_down(); - lpc_set_lock_enable(); - } -} - static void pmc_lockdown_config(int chipset_lockdown) { uint8_t *pmcbase; @@ -46,7 +36,6 @@ static void sata_lockdown_config(int chipset_lockdown) void soc_lockdown_config(int chipset_lockdown) { - lpc_lockdown_config(chipset_lockdown); pmc_lockdown_config(chipset_lockdown); sata_lockdown_config(chipset_lockdown); } |