diff options
| author | Kenneth Chan <kenneth.chan@quanta.corp-partner.google.com> | 2024-08-16 10:13:07 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2024-08-19 13:25:30 +0000 |
| commit | 5137e1e1995233f65e146e1b88887738cdd29527 (patch) | |
| tree | 72fef8bc43d35458c39808f8c1f1e7382007ae6d | |
| parent | f9ab107d32f9a92841430866096a63746bb96fe2 (diff) | |
mb/google/brya/var/nova: Set up soundbar-related GPIOs
Set up soundbar-related GPIOs for updating.
BUG=b:358435383
TEST=emerge-constitution coreboot chromeos-bootimage
Change-Id: I517da8de90487533e49e46649c5acf4ccfcc5160
Signed-off-by: Kenneth Chan <kenneth.chan@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83936
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Eric Lai <ericllai@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
| -rw-r--r-- | src/mainboard/google/brya/variants/nova/gpio.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/src/mainboard/google/brya/variants/nova/gpio.c b/src/mainboard/google/brya/variants/nova/gpio.c index 6ed8823faa..e895244dd5 100644 --- a/src/mainboard/google/brya/variants/nova/gpio.c +++ b/src/mainboard/google/brya/variants/nova/gpio.c @@ -41,11 +41,11 @@ static const struct pad_config override_gpio_table[] = { PAD_CFG_GPO(GPP_C4, 0, DEEP), /* D0 : ISH_GP0 ==> BOOT_SEL_N */ - PAD_NC(GPP_D0, NONE), + PAD_CFG_GPO_LOCK(GPP_D0, 1, LOCK_CONFIG), /* D1 : ISH_GP1 ==> REC_MODE */ PAD_NC(GPP_D1, NONE), /* D2 : ISH_GP2 ==> DEV_MODE_CTRL */ - PAD_NC(GPP_D2, NONE), + PAD_CFG_GPO_LOCK(GPP_D2, 0, LOCK_CONFIG), /* D3 : ISH_GP3 ==> BOOT_IND */ PAD_NC(GPP_D3, NONE), /* D9 : ISH_SPI_CS# ==> NC */ @@ -54,6 +54,8 @@ static const struct pad_config override_gpio_table[] = { PAD_CFG_GPI_LOCK(GPP_D10, NONE, LOCK_CONFIG), /* D13 : ISH_UART0_RXD ==> NC */ PAD_NC_LOCK(GPP_D13, NONE, LOCK_CONFIG), + /* D14 : ISH_UART0_TXD ==> QSPI_MR_N */ + PAD_CFG_GPO_LOCK(GPP_D14, 1, LOCK_CONFIG), /* D15 : ISH_UART0_RTS# ==> USI_RST_L */ PAD_CFG_GPO(GPP_D15, 1, DEEP), /* D16 : ISH_UART0_CTS# ==> USI_INT */ |