diff options
author | Elyes HAOUAS <ehaouas@noos.fr> | 2014-07-22 19:03:14 +0200 |
---|---|---|
committer | Patrick Georgi <patrick@georgi-clan.de> | 2014-07-24 12:42:47 +0200 |
commit | 4d529dab9279ab4ccb3768996c7a0262df843891 (patch) | |
tree | 9eafafb70299f0368fad3d4e676d793de7de870a | |
parent | 5cf47cc7905b861698bcf179d647e753702301b4 (diff) |
supermicro/h8qgi & h8scm: Remove a trailing whitespace
Change-Id: I9d44679f32b917dae42b9a6920c3d3c54626dcda
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: http://review.coreboot.org/6324
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
-rw-r--r-- | src/mainboard/supermicro/h8qgi/buildOpts.c | 18 | ||||
-rw-r--r-- | src/mainboard/supermicro/h8qgi/platform_cfg.h | 4 | ||||
-rw-r--r-- | src/mainboard/supermicro/h8scm/buildOpts.c | 18 | ||||
-rw-r--r-- | src/mainboard/supermicro/h8scm/platform_cfg.h | 4 |
4 files changed, 22 insertions, 22 deletions
diff --git a/src/mainboard/supermicro/h8qgi/buildOpts.c b/src/mainboard/supermicro/h8qgi/buildOpts.c index 1a1181e8c4..40dbc57a39 100644 --- a/src/mainboard/supermicro/h8qgi/buildOpts.c +++ b/src/mainboard/supermicro/h8qgi/buildOpts.c @@ -30,15 +30,15 @@ * coreboot enable -Wundef option, so we should make sure we have all contanstand defined */ /* MEMORY_BUS_SPEED */ -#define DDR400_FREQUENCY 200 ///< DDR 400 -#define DDR533_FREQUENCY 266 ///< DDR 533 -#define DDR667_FREQUENCY 333 ///< DDR 667 -#define DDR800_FREQUENCY 400 ///< DDR 800 -#define DDR1066_FREQUENCY 533 ///< DDR 1066 -#define DDR1333_FREQUENCY 667 ///< DDR 1333 -#define DDR1600_FREQUENCY 800 ///< DDR 1600 -#define DDR1866_FREQUENCY 933 ///< DDR 1866 -#define UNSUPPORTED_DDR_FREQUENCY 934 ///< Highest limit of DDR frequency +#define DDR400_FREQUENCY 200 ///< DDR 400 +#define DDR533_FREQUENCY 266 ///< DDR 533 +#define DDR667_FREQUENCY 333 ///< DDR 667 +#define DDR800_FREQUENCY 400 ///< DDR 800 +#define DDR1066_FREQUENCY 533 ///< DDR 1066 +#define DDR1333_FREQUENCY 667 ///< DDR 1333 +#define DDR1600_FREQUENCY 800 ///< DDR 1600 +#define DDR1866_FREQUENCY 933 ///< DDR 1866 +#define UNSUPPORTED_DDR_FREQUENCY 934 ///< Highest limit of DDR frequency /* QUANDRANK_TYPE*/ #define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM diff --git a/src/mainboard/supermicro/h8qgi/platform_cfg.h b/src/mainboard/supermicro/h8qgi/platform_cfg.h index 1663685c58..25696806f2 100644 --- a/src/mainboard/supermicro/h8qgi/platform_cfg.h +++ b/src/mainboard/supermicro/h8qgi/platform_cfg.h @@ -31,13 +31,13 @@ * Enable check for PCIe endpoint to be ready for PCI enumeration. * */ -//#define EPREADY_WORKAROUND_DISABLED +//#define EPREADY_WORKAROUND_DISABLED /** * Enable IOMMU support. Initialize IOMMU subsystem, generate IVRS ACPI table. * */ -#define IOMMU_SUPPORT_DISABLE //TODO: enable it +#define IOMMU_SUPPORT_DISABLE //TODO: enable it /** * Disable server PCIe hotplug support. diff --git a/src/mainboard/supermicro/h8scm/buildOpts.c b/src/mainboard/supermicro/h8scm/buildOpts.c index 543bc4f329..95dffaa440 100644 --- a/src/mainboard/supermicro/h8scm/buildOpts.c +++ b/src/mainboard/supermicro/h8scm/buildOpts.c @@ -30,15 +30,15 @@ * coreboot enable -Wundef option, so we should make sure we have all contanstand defined */ /* MEMORY_BUS_SPEED */ -#define DDR400_FREQUENCY 200 ///< DDR 400 -#define DDR533_FREQUENCY 266 ///< DDR 533 -#define DDR667_FREQUENCY 333 ///< DDR 667 -#define DDR800_FREQUENCY 400 ///< DDR 800 -#define DDR1066_FREQUENCY 533 ///< DDR 1066 -#define DDR1333_FREQUENCY 667 ///< DDR 1333 -#define DDR1600_FREQUENCY 800 ///< DDR 1600 -#define DDR1866_FREQUENCY 933 ///< DDR 1866 -#define UNSUPPORTED_DDR_FREQUENCY 934 ///< Highest limit of DDR frequency +#define DDR400_FREQUENCY 200 ///< DDR 400 +#define DDR533_FREQUENCY 266 ///< DDR 533 +#define DDR667_FREQUENCY 333 ///< DDR 667 +#define DDR800_FREQUENCY 400 ///< DDR 800 +#define DDR1066_FREQUENCY 533 ///< DDR 1066 +#define DDR1333_FREQUENCY 667 ///< DDR 1333 +#define DDR1600_FREQUENCY 800 ///< DDR 1600 +#define DDR1866_FREQUENCY 933 ///< DDR 1866 +#define UNSUPPORTED_DDR_FREQUENCY 934 ///< Highest limit of DDR frequency /* QUANDRANK_TYPE */ #define QUADRANK_REGISTERED 0 ///< Quadrank registered DIMM diff --git a/src/mainboard/supermicro/h8scm/platform_cfg.h b/src/mainboard/supermicro/h8scm/platform_cfg.h index 1663685c58..25696806f2 100644 --- a/src/mainboard/supermicro/h8scm/platform_cfg.h +++ b/src/mainboard/supermicro/h8scm/platform_cfg.h @@ -31,13 +31,13 @@ * Enable check for PCIe endpoint to be ready for PCI enumeration. * */ -//#define EPREADY_WORKAROUND_DISABLED +//#define EPREADY_WORKAROUND_DISABLED /** * Enable IOMMU support. Initialize IOMMU subsystem, generate IVRS ACPI table. * */ -#define IOMMU_SUPPORT_DISABLE //TODO: enable it +#define IOMMU_SUPPORT_DISABLE //TODO: enable it /** * Disable server PCIe hotplug support. |