summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorChris Wang <chris.wang@amd.corp-partner.google.com>2020-07-01 21:43:44 +0800
committerPatrick Georgi <pgeorgi@google.com>2020-07-07 08:56:03 +0000
commit4ab0db2d271c260aa316d38f4c3e03afa3c27959 (patch)
tree8da26b0b75233c43d3698dbcab1c0c7e3fd2bdff
parentae5679366bde2801e12a341dd76106e9136d22f9 (diff)
mb/google/zork: update telemetry settings for dalboz
update telemetry value for SDLE test result. BUG=b:152922299,b:152369472 TEST=emerge-zork coreboot Signed-off-by: Chris Wang <chris.wang@amd.corp-partner.google.com> Change-Id: I14d218243931271ba15ec4113e9bc46c670fb2ca Reviewed-on: https://review.coreboot.org/c/coreboot/+/42999 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/mainboard/google/zork/variants/dalboz/overridetree.cb8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/google/zork/variants/dalboz/overridetree.cb b/src/mainboard/google/zork/variants/dalboz/overridetree.cb
index 587d1c5da3..81fc4fd5f3 100644
--- a/src/mainboard/google/zork/variants/dalboz/overridetree.cb
+++ b/src/mainboard/google/zork/variants/dalboz/overridetree.cb
@@ -17,10 +17,10 @@ chip soc/amd/picasso
# End : OPN Performance Configuration
- register "telemetry_vddcr_vdd_slope" = "32239" #mA
- register "telemetry_vddcr_vdd_offset" = "0-37"
- register "telemetry_vddcr_soc_slope" = "22313" #mA
- register "telemetry_vddcr_soc_offset" = "0-209"
+ register "telemetry_vddcr_vdd_slope" = "30231" #mA
+ register "telemetry_vddcr_vdd_offset" = "0-1"
+ register "telemetry_vddcr_soc_slope" = "22644" #mA
+ register "telemetry_vddcr_soc_offset" = "68"
# I2C2 for touchscreen and trackpad
register "i2c[2]" = "{