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authorArne Georg Gleditsch <arne.gleditsch@numascale.com>2008-10-30 20:17:11 +0000
committerMarc Jones <marc.jones@amd.com>2008-10-30 20:17:11 +0000
commit429d6b66928119df0ba0c69d7f1232e8c2b904da (patch)
tree5f78d974f4a155bcc95373ffdd8d7f0f09ad4b8c
parentedc7ef2b76f8d49d1eeae9a111bdcae3f288d6f9 (diff)
Here's a patch towards r3690 upping the ROM size for the S2912 Fam10 target to 1M.
Both regular and abuild images have been boot tested successfully. Signed-off-by: Arne Georg Gleditsch <arne.gleditsch@numascale.com> Acked-by: Marc Jones <marc.jones@amd.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3711 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
-rw-r--r--src/mainboard/tyan/s2912_fam10/Config.lb6
-rw-r--r--src/mainboard/tyan/s2912_fam10/Options.lb6
-rw-r--r--targets/tyan/s2912_fam10/Config-abuild.lb24
-rw-r--r--targets/tyan/s2912_fam10/Config.lb72
4 files changed, 31 insertions, 77 deletions
diff --git a/src/mainboard/tyan/s2912_fam10/Config.lb b/src/mainboard/tyan/s2912_fam10/Config.lb
index 5af4ffba48..e82f4bee88 100644
--- a/src/mainboard/tyan/s2912_fam10/Config.lb
+++ b/src/mainboard/tyan/s2912_fam10/Config.lb
@@ -92,7 +92,7 @@ if USE_DCACHE_RAM
else
makerule ./cache_as_ram_auto.inc
depends "$(MAINBOARD)/$(CACHE_AS_RAM_AUTO_C) option_table.h"
- action "$(CC) -I$(TOP)/src -I. $(CFLAGS) $(CPPFLAGS) $(MAINBOARD)/$(CACHE_AS_RAM_AUTO_C) -Os -nostdinc -nostdlib -fno-builtin -Wall -c -S -o $@"
+ action "$(CC) $(DISTRO_CFLAGS) -I$(TOP)/src -I. $(CFLAGS) $(CPPFLAGS) $(MAINBOARD)/$(CACHE_AS_RAM_AUTO_C) -Os -nostdinc -nostdlib -fno-builtin -Wall -c -S -o $@"
action "perl -e 's/.rodata/.rom.data/g' -pi $@"
action "perl -e 's/.text/.section .rom.text/g' -pi $@"
end
@@ -105,7 +105,7 @@ else
if CONFIG_AP_CODE_IN_CAR
makerule ./apc_auto.o
depends "$(MAINBOARD)/apc_auto.c option_table.h"
- action "$(CC) -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/apc_auto.c -Os -nostdinc -nostdlib -fno-builtin -Wall -c -o $@"
+ action "$(CC) $(DISTRO_CFLAGS) -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/apc_auto.c -Os -nostdinc -nostdlib -fno-builtin -Wall -c -o $@"
end
ldscript /arch/i386/init/ldscript_apc.lb
end
@@ -345,7 +345,7 @@ chip northbridge/amd/amdfam10/root_complex
device pci 6.0 on
chip drivers/pci/onboard
device pci 4.0 on end
- register "rom_address" = "0xfff80000"
+ register "rom_address" = "0xfff00000"
end
end # PCI
device pci 6.1 off end # AZA
diff --git a/src/mainboard/tyan/s2912_fam10/Options.lb b/src/mainboard/tyan/s2912_fam10/Options.lb
index 5e048a0ce2..a0dacf676b 100644
--- a/src/mainboard/tyan/s2912_fam10/Options.lb
+++ b/src/mainboard/tyan/s2912_fam10/Options.lb
@@ -126,7 +126,7 @@ uses AMD_UCODE_PATCH_FILE
##
## ROM_SIZE is the size of boot ROM that this board will use.
##
-default ROM_SIZE=524288
+default ROM_SIZE=1024*1024
#default ROM_SIZE=0x100000
##
@@ -135,9 +135,7 @@ default ROM_SIZE=524288
#default FALLBACK_SIZE=131072
#default FALLBACK_SIZE=0x40000
-#FALLBACK: ROM_SIZE-4K
-default FALLBACK_SIZE=ROM_SIZE-0x01000
-#FAILOVER: 4K
+default FALLBACK_SIZE=0x3f000
default FAILOVER_SIZE=0x01000
#more 1M for pgtbl
diff --git a/targets/tyan/s2912_fam10/Config-abuild.lb b/targets/tyan/s2912_fam10/Config-abuild.lb
index 9f3ae3904e..b09c15fabe 100644
--- a/targets/tyan/s2912_fam10/Config-abuild.lb
+++ b/targets/tyan/s2912_fam10/Config-abuild.lb
@@ -21,26 +21,36 @@
target tyan_s2912_fam10
mainboard tyan/s2912_fam10
-__COMPRESSION__
+option CC="CROSSCC"
+option CROSS_COMPILE="CROSS_PREFIX"
+option HOSTCC="CROSS_HOSTCC"
-option ROM_SIZE = 0x80000
-option FALLBACK_SIZE = 0x40000
-option FAILOVER_SIZE = 0x00
+__COMPRESSION__
romimage "normal"
+ option USE_FAILOVER_IMAGE=0
option USE_FALLBACK_IMAGE=0
- option ROM_IMAGE_SIZE=0x24000
+ option ROM_IMAGE_SIZE=0x20000
option XIP_ROM_SIZE=0x40000
option COREBOOT_EXTRA_VERSION=".0-Normal"
payload __PAYLOAD__
end
romimage "fallback"
+ option USE_FAILOVER_IMAGE=0
option USE_FALLBACK_IMAGE=1
- option ROM_IMAGE_SIZE=0x24000
+ option ROM_IMAGE_SIZE=0x20000
option XIP_ROM_SIZE=0x40000
option COREBOOT_EXTRA_VERSION=".0-Fallback"
payload __PAYLOAD__
end
-buildrom ./coreboot.rom ROM_SIZE "normal" "fallback"
+romimage "failover"
+ option USE_FAILOVER_IMAGE=1
+ option USE_FALLBACK_IMAGE=0
+ option ROM_IMAGE_SIZE=FAILOVER_SIZE
+ option XIP_ROM_SIZE=FAILOVER_SIZE
+ option COREBOOT_EXTRA_VERSION=".0-Failover"
+end
+
+buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" "failover"
diff --git a/targets/tyan/s2912_fam10/Config.lb b/targets/tyan/s2912_fam10/Config.lb
index 64004350ca..5c9dfcd1e5 100644
--- a/targets/tyan/s2912_fam10/Config.lb
+++ b/targets/tyan/s2912_fam10/Config.lb
@@ -24,80 +24,27 @@
target s2912_fam10
mainboard tyan/s2912_fam10
-# This builds a fallback-only BIOS that fits in a 512K ROM. The S2912 onboard
-# flash is 1024K, so for use with that pad resulting ROM with 512KB lead-in.
+# Make room for ATI ES1000 VGA ROM
+option ROM_SIZE=ROM_SIZE-44*1024
-# Make room for ES1000 VGA ROM
-option ROM_SIZE=(512-44)*1024
-
-# serengeti_leopard
romimage "normal"
-# 48K for SCSI FW
-# option ROM_SIZE = 475136
-# 48K for SCSI FW and 48K for ATI ROM
-# option ROM_SIZE = 425984
-# 64K for Etherboot
-# option ROM_SIZE = 458752
-# 44k for atixx.rom
-# option ROM_SIZE = 479232
- option USE_FAILOVER_IMAGE=0
+ option USE_FAILOVER_IMAGE=0
option USE_FALLBACK_IMAGE=0
-# option ROM_IMAGE_SIZE=0x13800
-# option ROM_IMAGE_SIZE=0x18800
option ROM_IMAGE_SIZE=0x20000
-# option ROM_IMAGE_SIZE=0x15800
option XIP_ROM_SIZE=0x40000
option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal"
-# payload ../../../payloads/tg3--ide_disk.zelf
-# payload ../../../payloads/filo.elf
-# payload ../../../payloads/filo_mem.elf
-# payload ../../../payloads/filo.zelf
-# payload ../../../payloads/tg3--filo_hda2.zelf
-# payload ../../../payloads/tg3.zelf
-# payload ../../../../payloads/tg3_vga.zelf
-# payload ../../../../payloads/tg3--filo_hda2_vga.zelf
-# payload ../../../../payloads/tg3--filo_hda2_vga_5_4.zelf
-# payload ../../../../payloads/forcedeth--filo_hda2_vga.zelf
- payload ../../../../payloads/forcedeth--filo_hda2_vga_5_4_2_mcp55.zelf
-# payload ../../../payloads/tg3_com2.zelf
-# payload ../../../payloads/e1000--filo.zelf
-# payload ../../../payloads/tg3--e1000--filo.zelf
-# payload ../../../payloads/tg3--eepro100--e1000--filo_hda2.zelf
-# payload ../../../payloads/tg3--eepro100--e1000--filo_hda2_5.3.zelf
-# payload ../../../payloads/tg3--eepro100--e1000--filo_hda2_com2.zelf
+# payload ../../../../payloads/forcedeth--filo_hda2_vga_5_4_2_mcp55.zelf
+ payload ../payload.elf
end
romimage "fallback"
option USE_FAILOVER_IMAGE=0
option USE_FALLBACK_IMAGE=1
-# option ROM_IMAGE_SIZE=0x13800
-# option ROM_IMAGE_SIZE=0x19800
option ROM_IMAGE_SIZE=0x20000
-# option ROM_IMAGE_SIZE=0x15800
- option XIP_ROM_SIZE=0x20000
+ option XIP_ROM_SIZE=0x40000
option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback"
-# payload ../../../payloads/tg3--ide_disk.zelf
-# payload ../../../payloads/filo.elf
-# payload ../../../payloads/filo_mem.elf
-# payload ../../../payloads/filo.zelf
-# payload ../../../payloads/tg3--filo_hda2.zelf
-# payload ../../../payloads/tg3.zelf
-# payload ../../../../payloads/tg3_vga.zelf
-# payload ../../../../payloads/memtest
-# payload ../../../../payloads/e1000_vga.zelf
-# payload ../../../../payloads/tg3--filo_hda2_vga.zelf
-# payload ../../../../payloads/filo_hda.zelf
-# payload ../../../../payloads/adlo.elf
-# payload ../../../../payloads/tg3--filo_hda2_vga_5_4.zelf
-# payload ../../../../payloads/forcedeth_mcp55_filo_hda2.zelf
- payload ../../../../payloads/forcedeth--filo_hda2_vga_5_4_2_mcp55.zelf
-# payload ../../../../payloads/forcedeth--filo_hda2_vga.zelf
-# payload ../../../payloads/tg3_com2.zelf
-# payload ../../../payloads/e1000--filo.zelf
-# payload ../../../payloads/tg3--e1000--filo.zelf
-# payload ../../../payloads/tg3--eepro100--e1000--filo_hda2.zelf
-# payload ../../../payloads/tg3--eepro100--e1000--filo_hda2_5.3.zelf
-# payload ../../../payloads/tg3--eepro100--e1000--filo_hda2_com2.zelf
+# payload ../../../../payloads/forcedeth--filo_hda2_vga_5_4_2_mcp55.zelf
+ payload ../payload.elf
end
romimage "failover"
@@ -108,5 +55,4 @@ romimage "failover"
option COREBOOT_EXTRA_VERSION="$(shell cat ../../VERSION)_Failover"
end
-#buildrom ./coreboot.rom ROM_SIZE "normal" "failover"
-buildrom ./coreboot.rom ROM_SIZE "fallback" "failover"
+buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" "failover"