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authorMatt DeVillier <matt.devillier@gmail.com>2022-11-29 13:00:31 -0600
committerMatt DeVillier <matt.devillier@amd.corp-partner.google.com>2023-05-01 14:47:04 +0000
commit3d85d6b2924d34952e157d1be289e812fe80d17f (patch)
tree2bfba20daa0d09c31b2017599be5b7662f00fb2b
parentc259d719280612e0b358845abc882b1fbba4d232 (diff)
soc/intel/tgl: Unhide PMC, IOM ACPI devices from OS
These were hidden because no Windows drivers existed, but now that they do, the ACPI devices need to be visible in order for the drivers to properly attach. TEST=build google/drobit, boot Windows, verify Windows drivers correctly attach to PCM/IOM devices. Change-Id: I1520a71e318674baa234fc6a2126d1d17933d983 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/74829 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: CoolStar <coolstarorganization@gmail.com> Reviewed-by: Sean Rhodes <sean@starlabs.systems>
-rw-r--r--src/soc/intel/tigerlake/acpi/tcss.asl3
-rw-r--r--src/soc/intel/tigerlake/pmc.c3
2 files changed, 2 insertions, 4 deletions
diff --git a/src/soc/intel/tigerlake/acpi/tcss.asl b/src/soc/intel/tigerlake/acpi/tcss.asl
index 98337a3e5e..5af78edb8a 100644
--- a/src/soc/intel/tigerlake/acpi/tcss.asl
+++ b/src/soc/intel/tigerlake/acpi/tcss.asl
@@ -331,8 +331,7 @@ Scope (\_SB.PCI0)
Name (_CRS, ResourceTemplate () {
Memory32Fixed (ReadWrite, IOM_BASE_ADDRESS, IOM_BASE_SIZE)
})
- /* Hide the device so that Windows does not complain on missing driver */
- Name (_STA, 0xB)
+ Name (_STA, 0xF)
}
/*
diff --git a/src/soc/intel/tigerlake/pmc.c b/src/soc/intel/tigerlake/pmc.c
index 5ad8a8976a..51d46f8a33 100644
--- a/src/soc/intel/tigerlake/pmc.c
+++ b/src/soc/intel/tigerlake/pmc.c
@@ -107,8 +107,7 @@ static void soc_pmc_fill_ssdt(const struct device *dev)
acpigen_write_name_string("_HID", PMC_HID);
acpigen_write_name_string("_DDN", "Intel(R) Tiger Lake IPC Controller");
- /* Hide the device so that Windows does not complain on missing driver */
- acpigen_write_STA(ACPI_STATUS_DEVICE_HIDDEN_ON);
+ acpigen_write_STA(ACPI_STATUS_DEVICE_ALL_ON);
/*
* Part of the PCH's reserved 32 MB MMIO range (0xFC800000 - 0xFE7FFFFF).