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authorNicholas Chin <nic.c3.14@gmail.com>2022-11-06 12:18:20 -0700
committerMartin L Roth <gaumless@gmail.com>2022-11-13 15:32:26 +0000
commit3d2a6f49565ff2b8696f89625c979283feb8217a (patch)
tree75331c178b72611acb13601511b5e9050891e1d4
parent27c94b586cb1692c93a5efc17a636735a3176ffe (diff)
util/superiotool: Add Nuvoton NCT6685D/NCT6686D
There doesn't seem to be a datasheet available for the NCT6685D, but there is one for the NCT6686D. The 85D seems to return the same ID as the 86D, and the registers do seem to be returning valid data other than LDN 0xf which returns all 1s. The LDN and register layout appears to be identical to the NCT6687D-W. Tested on a Lenovo ThinkCentre M900 with a NCT6685D. Change-Id: I4de0e7b86422a14ab9ccb15b7571597611d755d5 Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69480 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
-rw-r--r--util/superiotool/nuvoton.c67
1 files changed, 67 insertions, 0 deletions
diff --git a/util/superiotool/nuvoton.c b/util/superiotool/nuvoton.c
index ea11393000..21d77fd931 100644
--- a/util/superiotool/nuvoton.c
+++ b/util/superiotool/nuvoton.c
@@ -82,6 +82,73 @@ static const struct superio_registers reg_table[] = {
{EOT}}},
{0x1a, "WPCM450", {
{EOT}}},
+ {0xc73a, "NCT6685D/NCT6686D", {
+ {NOLDN, "Global Configuration",
+ {0x10,0x11,0x13,0x14,0x15,0x1a,0x1b,0x1d,0x1e,
+ 0x1f,0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,
+ 0x28,0x29,0x2a,0x2b,0x2c,0x2d,0x2f,EOT},
+ {0xff,0xff,0x00,0x00,0x00,0x00,0x10,0x00,0x00,
+ 0x00,0xc7,0x3a,0x00,0x80,0x67,0x01,0x00,0x3e,
+ 0x00,0x03,0x0f,0x00,0x00,0x00,MISC,EOT}},
+ {0x01, "Parallel Port",
+ {0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
+ {0x00,0x00,0x00,0x00,0x00,0x3f,EOT}},
+ {0x02, "UART A",
+ {0x30,0x60,0x61,0x70,0xf0,EOT},
+ {0x00,0x00,0x00,0x00,0x00,EOT}},
+ {0x03, "UART B, IR",
+ {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
+ {0x00,0x00,0x00,0x00,0x00,0x00,EOT}},
+ {0x05, "Keyboard Controller",
+ {0x30,0x60,0x61,0x62,0x63,0x70,0x72,0xf0,EOT},
+ {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x83,EOT}},
+ {0x06, "CIR",
+ {0x30,0x60,0x61,0x70,0xf0,0xf1,0xf2,0xf3,EOT},
+ {0x00,0x00,0x00,0x00,0x08,0x09,0x32,0x00,EOT}},
+ {0x07, "GPIO0-7",
+ {0x30,0x60,0x61,0x70,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,
+ 0xe6,0xe7,0xe8,0xe9,0xeb,0xec,0xed,0xee,0xef,0xf0,
+ 0xf1,EOT},
+ {0x00,0x00,0x00,0x00,NANA,NANA,NANA,NANA,NANA,NANA,
+ NANA,NANA,NANA,NANA,NANA,NANA,NANA,NANA,NANA,NANA,
+ 0x01,EOT}},
+ {0x08, "PORT80 UART",
+ {0xe0,0xe1,0xe2,0xe3,0xe4,EOT},
+ {0x80,0x00,0x00,0x10,0x00,EOT}},
+ {0x09, "GPIO8-9, GPIO1-8 Alternate Function",
+ {0x30,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xe8,
+ 0xe9,0xea,0xeb,0xec,0xed,0xee,0xef,EOT},
+ {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,EOT}},
+ {0x0a, "ACPI",
+ {0x30,0x60,0x61,0x70,0xe0,0xe1,0xe2,0xe3,0xe4,0xe6,
+ 0xe7,0xe8,0xea,0xeb,0xec,0xee,0xf0,0xf1,0xf2,0xf3,
+ 0xf4,0xf5,0xf6,0xf7,0xf8,0xf9,0xfa,0xfb,0xfc,EOT},
+ {0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,
+ 0xef,0x80,0x2e,0x00,0x01,0x00,0x00,0x00,0x00,0x00,
+ 0x0d,0x0d,0x01,0x00,0x04,0x00,0x00,0x00,0x04,EOT}},
+ {0x0b, "EC",
+ {0x30,0x60,0x61,0x70,0xe0,0xe3,0xe4,EOT},
+ {0x00,0x00,0x00,0x00,0x00,0x00,0x00,EOT}},
+ {0x0c, "RTC",
+ {0x30,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xe8,
+ 0xe9,0xea,0xeb,0xec,0xed,0xee,0xef,0xf0,EOT},
+ {0x00,NANA,NANA,NANA,NANA,NANA,NANA,NANA,0x00,0x00,
+ 0x00,0x00,0x00,0x07,0x00,0x00,0x00,0x80,EOT}},
+ {0x0d, "Deep Sleep, Power Fault",
+ {0x30,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xe8,
+ 0xf0,0xf1,0xf3,EOT},
+ {0xa0,0x20,0x04,0x05,0x6e,0x00,0x00,0x00,0x88,0x77,
+ 0x70,0xaa,0x01,EOT}},
+ {0x0e, "TACHIN/PWMOUT Assignment",
+ {0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xe8,0xe9,
+ 0xea,0xeb,EOT},
+ {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+ 0x00,0x00,EOT}},
+ {0x0f, "Function Register",
+ {0xe3,0xe4,0xe5,0xe8,0xe9,0xea,EOT},
+ {0x80,0x01,0x00,0x00,0x00,0x00,EOT}},
+ {EOT}}},
{0xd592, "NCT6687D-W", {
{NOLDN, "Global Configuration",
{0x10,0x11,0x13,0x14,0x15,0x1a,0x1b,0x1d,0x1e,