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authorSaurabh Satija <saurabh.satija@intel.com>2016-03-31 15:41:30 -0700
committerAaron Durbin <adurbin@chromium.org>2016-06-28 22:56:22 +0200
commit3d0e2871cbf6d0c639ed1c4864c919318c3a8e28 (patch)
treef58347077455416990ad9463e6832c77006a9aca
parentcbaa2abd6f5df9d97678920f1c3e78cad3614ace (diff)
soc/intel/apollolake: Add NHLT table region to ACPI global nvs
Add address and length of NHLT table in ACPI. Change-Id: Ic0959a8aae18d54e10e3fcd95bfc98a6b6e0385a Signed-off-by: Saurabh Satija <saurabh.satija@intel.com> Reviewed-on: https://review.coreboot.org/15025 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
-rw-r--r--src/soc/intel/apollolake/acpi/globalnvs.asl2
-rw-r--r--src/soc/intel/apollolake/include/soc/nvs.h4
2 files changed, 5 insertions, 1 deletions
diff --git a/src/soc/intel/apollolake/acpi/globalnvs.asl b/src/soc/intel/apollolake/acpi/globalnvs.asl
index b2b7f5306b..404f36c294 100644
--- a/src/soc/intel/apollolake/acpi/globalnvs.asl
+++ b/src/soc/intel/apollolake/acpi/globalnvs.asl
@@ -36,6 +36,8 @@ Field (GNVS, ByteAcc, NoLock, Preserve)
CBMC, 32, // 0x05 - 0x08 - Coreboot Memory Console
PM1I, 64, // 0x09 - 0x10 - System Wake Source - PM1 Index
GPEI, 64, // 0x11 - 0x18 - GPE Wake Source
+ NHLA, 64, // 0x19 - 0x20 - NHLT Address
+ NHLL, 32, // 0x21 - 0x24 - NHLT Length
/* ChromeOS stuff (0x100 -> 0xfff, size 0xeff) */
Offset (0x100),
diff --git a/src/soc/intel/apollolake/include/soc/nvs.h b/src/soc/intel/apollolake/include/soc/nvs.h
index c7918126d7..3e4f432a78 100644
--- a/src/soc/intel/apollolake/include/soc/nvs.h
+++ b/src/soc/intel/apollolake/include/soc/nvs.h
@@ -36,7 +36,9 @@ struct global_nvs_t {
uint32_t cbmc; /* 0x05 - 0x08 - Coreboot Memory Console */
uint64_t pm1i; /* 0x09 - 0x10 - System Wake Source - PM1 Index */
uint64_t gpei; /* 0x11 - 0x18 - GPE Wake Source */
- uint8_t unused[231];
+ uint64_t nhla; /* 0x19 - 0x20 - NHLT Address */
+ uint32_t nhll; /* 0x21 - 0x24 - NHLT Length */
+ uint8_t unused[219];
/* ChromeOS specific (0x100 - 0xfff) */
chromeos_acpi_t chromeos;