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authorSubrata Banik <subrata.banik@intel.com>2020-09-24 13:33:48 +0530
committerSubrata Banik <subrata.banik@intel.com>2020-09-25 03:03:14 +0000
commit3bcb6c7319ac5f23d7e5a9e637917cbd027ac371 (patch)
tree5d459b8229de7f8253fb0f13c12c8ead776eb82d
parent8d4176109d404dbbaf4689281ccec635c1070e99 (diff)
soc/intel: Use ASL 2.0 syntax for GPIO ASL helper function
Migrate ASL helper function like GRXS, GTXS, STXS, CTXS to ASL 2.0 syntax across CNL, ICL, JSL, SKL. TEST=Able to build and boot Hatch, EVE and ICLRVP platform. Dump and disassemble DSDT to ensure GRXS,GTXS etc functions implementation remain unchanged prior and after this CL. Change-Id: I0ebf1f86031eae25337d2dbeabb8893d9f19a14b Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45677 Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/soc/intel/cannonlake/acpi/gpio_op.asl31
-rw-r--r--src/soc/intel/icelake/acpi/gpio.asl2
-rw-r--r--src/soc/intel/skylake/acpi/gpio.asl8
3 files changed, 20 insertions, 21 deletions
diff --git a/src/soc/intel/cannonlake/acpi/gpio_op.asl b/src/soc/intel/cannonlake/acpi/gpio_op.asl
index 3c0ed66f58..7f2a40cd46 100644
--- a/src/soc/intel/cannonlake/acpi/gpio_op.asl
+++ b/src/soc/intel/cannonlake/acpi/gpio_op.asl
@@ -11,7 +11,7 @@ Method (GRXS, 1, Serialized)
{
VAL0, 32
}
- And (GPIORXSTATE_MASK, ShiftRight (VAL0, GPIORXSTATE_SHIFT), Local0)
+ Local0 = GPIORXSTATE_MASK & (VAL0 >> GPIORXSTATE_SHIFT)
Return (Local0)
}
@@ -27,7 +27,7 @@ Method (GTXS, 1, Serialized)
{
VAL0, 32
}
- And (GPIOTXSTATE_MASK, VAL0, Local0)
+ Local0 = GPIOTXSTATE_MASK & VAL0
Return (Local0)
}
@@ -43,7 +43,7 @@ Method (STXS, 1, Serialized)
{
VAL0, 32
}
- Or (GPIOTXSTATE_MASK, VAL0, VAL0)
+ VAL0 |= GPIOTXSTATE_MASK
}
/*
@@ -57,7 +57,7 @@ Method (CTXS, 1, Serialized)
{
VAL0, 32
}
- And (Not (GPIOTXSTATE_MASK), VAL0, VAL0)
+ VAL0 &= ~GPIOTXSTATE_MASK
}
/*
@@ -76,10 +76,9 @@ Method (GPMO, 2, Serialized)
{
VAL0, 32
}
- Store (VAL0, Local0)
- And (Not (GPIOPADMODE_MASK), Local0, Local0)
- And (ShiftLeft (Arg1, GPIOPADMODE_SHIFT, Arg1), GPIOPADMODE_MASK, Arg1)
- Or (Local0, Arg1, VAL0)
+ Local0 = ~GPIOPADMODE_MASK & VAL0
+ Arg1 = (Arg1 << GPIOPADMODE_SHIFT) & GPIOPADMODE_MASK
+ VAL0 = Local0 | Arg1
}
/*
@@ -97,10 +96,10 @@ Method (GTXE, 2, Serialized)
VAL0, 32
}
- If (LEqual (Arg1, 1)) {
- And (Not (GPIOTXBUFDIS_MASK), VAL0, VAL0)
- } ElseIf (LEqual (Arg1, 0)){
- Or (GPIOTXBUFDIS_MASK, VAL0, VAL0)
+ If (Arg1 == 1) {
+ VAL0 &= ~GPIOTXBUFDIS_MASK
+ } ElseIf (Arg1 == 0){
+ VAL0 |= GPIOTXBUFDIS_MASK
}
}
@@ -119,9 +118,9 @@ Method (GRXE, 2, Serialized)
VAL0, 32
}
- If (LEqual (Arg1, 1)) {
- And (Not (GPIORXBUFDIS_MASK), VAL0, VAL0)
- } ElseIf (LEqual (Arg1, 0)){
- Or (GPIORXBUFDIS_MASK, VAL0, VAL0)
+ If (Arg1 == 1) {
+ VAL0 &= ~GPIORXBUFDIS_MASK
+ } ElseIf (Arg1 == 0){
+ VAL0 |= GPIORXBUFDIS_MASK
}
}
diff --git a/src/soc/intel/icelake/acpi/gpio.asl b/src/soc/intel/icelake/acpi/gpio.asl
index 43aa83c732..f0a6fa064c 100644
--- a/src/soc/intel/icelake/acpi/gpio.asl
+++ b/src/soc/intel/icelake/acpi/gpio.asl
@@ -114,7 +114,7 @@ Method (GRXS, 1, Serialized)
{
VAL0, 32
}
- And (GPIORXSTATE_MASK, ShiftRight (VAL0, GPIORXSTATE_SHIFT), Local0)
+ Local0 = GPIORXSTATE_MASK & (VAL0 >> GPIORXSTATE_SHIFT)
Return (Local0)
}
diff --git a/src/soc/intel/skylake/acpi/gpio.asl b/src/soc/intel/skylake/acpi/gpio.asl
index 60e1cf5730..de6ff42226 100644
--- a/src/soc/intel/skylake/acpi/gpio.asl
+++ b/src/soc/intel/skylake/acpi/gpio.asl
@@ -119,7 +119,7 @@ Method (GRXS, 1, Serialized)
{
VAL0, 32
}
- And (GPIORXSTATE_MASK, ShiftRight (VAL0, PAD_CFG0_RX_STATE_BIT), Local0)
+ Local0 = GPIORXSTATE_MASK & (VAL0 >> PAD_CFG0_RX_STATE_BIT)
Return (Local0)
}
@@ -135,7 +135,7 @@ Method (GTXS, 1, Serialized)
{
VAL0, 32
}
- And (GPIOTXSTATE_MASK, ShiftRight (VAL0, PAD_CFG0_TX_STATE_BIT), Local0)
+ Local0 = GPIOTXSTATE_MASK & VAL0
Return (Local0)
}
@@ -151,7 +151,7 @@ Method (STXS, 1, Serialized)
{
VAL0, 32
}
- Or (GPIOTXSTATE_MASK, VAL0, VAL0)
+ VAL0 |= GPIOTXSTATE_MASK
}
/*
@@ -165,5 +165,5 @@ Method (CTXS, 1, Serialized)
{
VAL0, 32
}
- And (Not (GPIOTXSTATE_MASK), VAL0, VAL0)
+ VAL0 &= ~GPIOTXSTATE_MASK
}