diff options
| author | Matt DeVillier <matt.devillier@gmail.com> | 2018-12-25 22:22:47 -0600 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-03-03 10:12:02 +0000 |
| commit | 3a7a3390f5e98ed62ce912072438d04582407b46 (patch) | |
| tree | b968113f6ac9b5c2686a952a211d53c496c5d33f | |
| parent | aa3b5e29f2a6f15034f4a195c5871b4189350ddc (diff) | |
soc/broadwell: hook up smmstore
Adapted from implementation in sb/intel/common.
Test: build/boot variants of google/{jecht, auron}
with Tianocore and SMMSTORE enabled
Change-Id: I4d2aaa80dad229a6c7b947d0edf8fb1174050ad0
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39192
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
| -rw-r--r-- | src/soc/intel/broadwell/smihandler.c | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/src/soc/intel/broadwell/smihandler.c b/src/soc/intel/broadwell/smihandler.c index 5b04f799a3..2c388870a0 100644 --- a/src/soc/intel/broadwell/smihandler.c +++ b/src/soc/intel/broadwell/smihandler.c @@ -35,6 +35,7 @@ #include <soc/rcba.h> #include <soc/xhci.h> #include <drivers/intel/gma/i915_reg.h> +#include <smmstore.h> static u8 smm_initialized = 0; @@ -311,6 +312,26 @@ static void southbridge_smi_gsmi(void) *ret = gsmi_exec(sub_command, param); } +static void southbridge_smi_store(void) +{ + u8 sub_command, ret; + em64t101_smm_state_save_area_t *io_smi = + smi_apmc_find_state_save(APM_CNT_SMMSTORE); + uint32_t reg_ebx; + + if (!io_smi) + return; + /* Command and return value in EAX */ + sub_command = (io_smi->rax >> 8) & 0xff; + + /* Parameter buffer in EBX */ + reg_ebx = io_smi->rbx; + + /* drivers/smmstore/smi.c */ + ret = smmstore_exec(sub_command, (void *)reg_ebx); + io_smi->rax = ret; +} + static void southbridge_smi_apmc(void) { u8 reg8; @@ -352,6 +373,10 @@ static void southbridge_smi_apmc(void) if (CONFIG(ELOG_GSMI)) southbridge_smi_gsmi(); break; + case APM_CNT_SMMSTORE: + if (CONFIG(SMMSTORE)) + southbridge_smi_store(); + break; } mainboard_smi_apmc(reg8); |