added new superio. added new simple util.

modified dell 1850


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2178 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

9 files changed, 201 insertions, 12 deletions

diff --git a/src/mainboard/dell/s1850/Config.lb b/src/mainboard/dell/s1850/Config.lb
index dff583ce2c..57e6b0a1f7 100644
--- a/src/mainboard/dell/s1850/Config.lb
+++ b/src/mainboard/dell/s1850/Config.lb
@@ -147,23 +147,19 @@ chip northbridge/intel/E7520 # mch
 		
 			# -> ISA
 			device pci 1f.0 on 
-				chip superio/winbond/w83627hf
+				chip superio/NSC/pc8734
 					device pnp 2e.0 off end
-					device pnp 2e.2 on 
+					device pnp 2e.1 off end
+					device pnp 2e.2 off end
+					device pnp 2e.3 on 
 						 io 0x60 = 0x3f8
 						irq 0x70 = 4
 					end
-					device pnp 2e.3 on
-						 io 0x60 = 0x2f8
-						irq 0x70 = 3
-					end
 					device pnp 2e.4 off end
 					device pnp 2e.5 off end
 					device pnp 2e.6 off end
 					device pnp 2e.7 off end
-					device pnp 2e.9 off end
-					device pnp 2e.a on  end
-					device pnp 2e.b off end
+					device pnp 2e.8 off end
 				end
 			end
 			# -> IDE
@@ -172,8 +168,8 @@ chip northbridge/intel/E7520 # mch
 			device pci 1f.2 on end
 			device pci 1f.3 on end
 
-			register "pirq_a_d" = "0x0b070a05"
-			register "pirq_e_h" = "0x0a808080"
+			register "pirq_a_d" = "0x8a07030b"
+			register "pirq_e_h" = "0x85808080"
 		end
 		device pci 00.0 on end 
 		device pci 00.1 on end
@@ -204,6 +200,6 @@ chip northbridge/intel/E7520 # mch
 			device apic 6 on end
 		end
 	end
-	register "intrline" = "0x00070105"
+	register "intrline" = "0x00070100"
 end
 
diff --git a/src/superio/NSC/pc8374/Config.lb b/src/superio/NSC/pc8374/Config.lb
new file mode 100644
index 0000000000..f62a567d61
--- /dev/null
+++ b/src/superio/NSC/pc8374/Config.lb
@@ -0,0 +1,2 @@
+config chip.h
+object superio.o
diff --git a/src/superio/NSC/pc8374/chip.h b/src/superio/NSC/pc8374/chip.h
new file mode 100644
index 0000000000..d3c6c44522
--- /dev/null
+++ b/src/superio/NSC/pc8374/chip.h
@@ -0,0 +1,17 @@
+#ifndef SIO_COM1
+#define SIO_COM1_BASE   0x3F8
+#endif
+#ifndef SIO_COM2
+#define SIO_COM2_BASE   0x2F8
+#endif
+
+struct chip_operations;
+extern struct chip_operations superio_NSC_pc8374_ops;
+
+#include <pc80/keyboard.h>
+#include <uart8250.h>
+
+struct superio_NSC_pc8374_config {
+	struct uart8250 com1, com2;
+	struct pc_keyboard keyboard;
+};
diff --git a/src/superio/NSC/pc8374/pc87360.h b/src/superio/NSC/pc8374/pc87360.h
new file mode 100644
index 0000000000..1f166a70fe
--- /dev/null
+++ b/src/superio/NSC/pc8374/pc87360.h
@@ -0,0 +1,9 @@
+#define PC8374_FDC  0x00 /* Floppy */
+#define PC8374_PP   0x01 /* Parallel port */
+#define PC8374_SP2  0x02 /* Com2 */
+#define PC8374_SP1  0x03 /* Com1 */
+#define PC8374_SWC  0x04
+#define PC8374_KBCM 0x05 /* Mouse */
+#define PC8374_KBCK 0x06 /* Keyboard */
+#define PC8374_GPIO 0x07
+#define PC8374_HM  0x08
diff --git a/src/superio/NSC/pc8374/pc87360_early_serial.c b/src/superio/NSC/pc8374/pc87360_early_serial.c
new file mode 100644
index 0000000000..be496070ec
--- /dev/null
+++ b/src/superio/NSC/pc8374/pc87360_early_serial.c
@@ -0,0 +1,11 @@
+#include <arch/romcc_io.h>
+#include "pc8374.h"
+
+
+static void pc8374_enable_serial(device_t dev, unsigned iobase)
+{
+	pnp_set_logical_device(dev);
+	pnp_set_enable(dev, 1);
+	pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
+	pnp_set_enable(dev, 1);
+}
diff --git a/src/superio/NSC/pc8374/superio.c b/src/superio/NSC/pc8374/superio.c
new file mode 100644
index 0000000000..b7dcde4bbc
--- /dev/null
+++ b/src/superio/NSC/pc8374/superio.c
@@ -0,0 +1,73 @@
+/* Copyright 2000  AG Electronics Ltd. */
+/* Copyright 2003-2004 Linux Networx */
+/* This code is distributed without warranty under the GPL v2 (see COPYING) */
+
+#include <arch/io.h>
+#include <device/device.h>
+#include <device/pnp.h>
+#include <console/console.h>
+#include <string.h>
+#include <bitops.h>
+#include <uart8250.h>
+#include <pc80/keyboard.h>
+#include "chip.h"
+#include "pc8374.h"
+
+static void init(device_t dev)
+{
+	struct superio_NSC_pc8374_config *conf;
+	struct resource *res0, *res1;
+	/* Wishlist handle well known programming interfaces more
+	 * generically.
+	 */
+	if (!dev->enabled) {
+		return;
+	}
+	conf = dev->chip_info;
+	switch(dev->path.u.pnp.device) {
+	case PC8374_SP1: 
+		res0 = find_resource(dev, PNP_IDX_IO0);
+		init_uart8250(res0->base, &conf->com1);
+		break;
+	case PC8374_SP2:
+		res0 = find_resource(dev, PNP_IDX_IO0);
+		init_uart8250(res0->base, &conf->com2);
+		break;
+	case PC8374_KBCK:
+		res0 = find_resource(dev, PNP_IDX_IO0);
+		res1 = find_resource(dev, PNP_IDX_IO1);
+		init_pc_keyboard(res0->base, res1->base, &conf->keyboard);
+		break;
+	}
+}
+
+static struct device_operations ops = {
+	.read_resources   = pnp_read_resources,
+	.set_resources    = pnp_set_resources,
+	.enable_resources = pnp_enable_resources,
+	.enable           = pnp_enable,
+	.init             = init,
+};
+
+static struct pnp_info pnp_dev_info[] = {
+ { &ops, PC8374_FDC,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07fa, 0}, },
+ { &ops, PC8374_PP,   PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x04f8, 0}, },
+ { &ops, PC8374_SP2,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0x7f8, 0 }, },
+ { &ops, PC8374_SP1,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
+ { &ops, PC8374_SWC,  PNP_IO0 | PNP_IRQ0, { 0xfff0, 0 }, },
+ { &ops, PC8374_KBCM, PNP_IRQ0 },
+ { &ops, PC8374_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7f8, 0 }, { 0x7f8, 0x4}, },
+ { &ops, PC8374_GPIO, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 } },
+};
+
+
+static void enable_dev(struct device *dev)
+{
+	pnp_enable_devices(dev, &ops,
+		sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), pnp_dev_info);
+}
+
+struct chip_operations superio_NSC_pc8374_ops = {
+	CHIP_NAME("NSC 8374")
+	.enable_dev = enable_dev,
+};
diff --git a/util/probe_superio/Makefile b/util/probe_superio/Makefile
new file mode 100644
index 0000000000..37b13b1ba9
--- /dev/null
+++ b/util/probe_superio/Makefile
@@ -0,0 +1,2 @@
+probe_superio: probe_superio.c
+	cc -O2 -o probe_superio probe_superio.c
diff --git a/util/probe_superio/probe_superio b/util/probe_superio/probe_superio
new file mode 100755
index 0000000000..79601d15ec
--- /dev/null
+++ b/util/probe_superio/probe_superio
diff --git a/util/probe_superio/probe_superio.c b/util/probe_superio/probe_superio.c
new file mode 100644
index 0000000000..6bb1347e15
--- /dev/null
+++ b/util/probe_superio/probe_superio.c
@@ -0,0 +1,79 @@
+#include <stdio.h>
+#include <sys/io.h>
+
+/* well, they really thought this throught, eh? Family is 8 bits!!!! */
+char *familyid[] = {
+	[0xf1] = "pc8374 (winbond, was NS)"
+};
+
+/* eventually, if you care, break this out into a file. For now, I don't know 
+  * if we need this. 
+  */
+
+unsigned char regval(unsigned short port, unsigned short reg) {
+	outb(reg, port);
+	return inb(port+1);
+}
+
+void
+dump_ns8374(unsigned short port) {
+	printf("Enables: 21=%02x, 22=%02x, 23=%02x, 24=%02x, 26=%02x\n", 
+			regval(port,0x21), regval(port,0x22), 
+			regval(port,0x23), regval(port,0x24), regval(port,0x26));
+	/* check COM1. This is all we care about at present. */
+	printf("COM 1 is Globally %s\n", regval(port,0x26)&8 ? "disabled" : "enabled");
+	/* select com1 */
+	outb(0x7, port);
+	outb(3, port+1);
+	printf("COM 1 is locally %s\n", regval(port, 0x30) & 1 ? "enabled" : "disabled");
+	printf("COM1 60=%02x, 61=%02x, 70=%02x, 71=%02x, 74=%02x, 75=%02x, f0=%02x\n", 
+		regval(port, 0x60), regval(port, 0x61), regval(port, 0x70), regval(port, 0x71),
+		regval(port, 0x74), regval(port, 0x75), regval(port, 0xf0));
+
+}
+
+void
+probe_idregs(unsigned short port){
+	unsigned char id;
+	int i;
+	outb(0x20, port);
+	if (inb(port) != 0x20)  {
+		printf("probing 0x%04x, failed (0x%02x), data returns 0x%02x\n", 
+					port, inb(port), inb(port+1));
+		return;
+	}
+	id = inb(port+1);
+	printf("Probe of id returns %02x\n", id);
+	if (id == 0xff)
+		return;
+
+	printf("%s\n", familyid[id]);
+	switch(id) {
+		case 0xf1:
+			dump_ns8374(port);
+			break;
+		default:
+			printf("no dump for 0x%02x\n", id);
+			break;
+	}
+}
+
+void
+probe_superio(unsigned short port) {
+	probe_idregs(port);
+}
+
+int
+main(int argc, char *argv[]){
+	unsigned short port;
+
+	if (iopl(3) < 0) {
+		perror("iopl");
+		exit(1);
+	}
+
+	/* try the 2e */
+	probe_superio(0x2e);
+	/* now try the 4e */
+	probe_superio(0x4e);
+}