haswell: Drop `mainboard_fill_pei_data`

Use global variables to provide mainboard USB settings, and have the
northbridge code copy it into the `pei_data` struct. For now.

To minimize diffstat noise, this patch does not reindent the now-global
mainboard USB configuration arrays. This is cleaned up in a follow-up.

Change-Id: I273c7a6cd46734ae25b95fc11b5e188d63cac32e
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50538
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

16 files changed, 32 insertions, 106 deletions

diff --git a/src/mainboard/asrock/b85m_pro4/romstage.c b/src/mainboard/asrock/b85m_pro4/romstage.c
index 119d007cf1..16f3d0a8a4 100644
--- a/src/mainboard/asrock/b85m_pro4/romstage.c
+++ b/src/mainboard/asrock/b85m_pro4/romstage.c
@@ -25,9 +25,7 @@ void mb_get_spd_map(uint8_t spd_map[4])
 	spd_map[3] = 0xa6;
 }
 
-void mainboard_fill_pei_data(struct pei_data *pei_data)
-{
-	struct usb2_port_setting usb2_ports[MAX_USB2_PORTS] = {
+	const struct usb2_port_setting mainboard_usb2_ports[MAX_USB2_PORTS] = {
 		/* Length, Enable, OCn#, Location */
 		{ 0x0040, 1, 0, USB_PORT_BACK_PANEL },
 		{ 0x0040, 1, 0, USB_PORT_BACK_PANEL },
@@ -45,7 +43,7 @@ void mainboard_fill_pei_data(struct pei_data *pei_data)
 		{ 0x0040, 1, 6, USB_PORT_BACK_PANEL },
 	};
 
-	struct usb3_port_setting usb3_ports[MAX_USB3_PORTS] = {
+	const struct usb3_port_setting mainboard_usb3_ports[MAX_USB3_PORTS] = {
 		{ 1, 0 },
 		{ 1, 0 },
 		{ 1, 1 },
@@ -53,7 +51,3 @@ void mainboard_fill_pei_data(struct pei_data *pei_data)
 		{ 1, 2 },
 		{ 1, 2 },
 	};
-
-	memcpy(pei_data->usb2_ports, usb2_ports, sizeof(usb2_ports));
-	memcpy(pei_data->usb3_ports, usb3_ports, sizeof(usb3_ports));
-}
diff --git a/src/mainboard/asrock/h81m-hds/romstage.c b/src/mainboard/asrock/h81m-hds/romstage.c
index deb6ec941b..b8ecd43e82 100644
--- a/src/mainboard/asrock/h81m-hds/romstage.c
+++ b/src/mainboard/asrock/h81m-hds/romstage.c
@@ -23,9 +23,7 @@ void mb_get_spd_map(uint8_t spd_map[4])
 	spd_map[2] = 0xa4;
 }
 
-void mainboard_fill_pei_data(struct pei_data *pei_data)
-{
-	struct usb2_port_setting usb2_ports[MAX_USB2_PORTS] = {
+	const struct usb2_port_setting mainboard_usb2_ports[MAX_USB2_PORTS] = {
 		/* Length, Enable, OCn#, Location */
 		{ 0x0040, 1, 0, USB_PORT_BACK_PANEL },
 		{ 0x0040, 1, 0, USB_PORT_BACK_PANEL },
@@ -43,7 +41,7 @@ void mainboard_fill_pei_data(struct pei_data *pei_data)
 		{ 0x0040, 0, USB_OC_PIN_SKIP, USB_PORT_SKIP },
 	};
 
-	struct usb3_port_setting usb3_ports[MAX_USB3_PORTS] = {
+	const struct usb3_port_setting mainboard_usb3_ports[MAX_USB3_PORTS] = {
 		/* Enable, OCn# */
 		{ 1, 0 },
 		{ 1, 0 },
@@ -52,7 +50,3 @@ void mainboard_fill_pei_data(struct pei_data *pei_data)
 		{ 0, USB_OC_PIN_SKIP },
 		{ 0, USB_OC_PIN_SKIP },
 	};
-
-	memcpy(pei_data->usb2_ports, usb2_ports, sizeof(usb2_ports));
-	memcpy(pei_data->usb3_ports, usb3_ports, sizeof(usb3_ports));
-}
diff --git a/src/mainboard/google/beltino/romstage.c b/src/mainboard/google/beltino/romstage.c
index ee146301ec..f009f5abe1 100644
--- a/src/mainboard/google/beltino/romstage.c
+++ b/src/mainboard/google/beltino/romstage.c
@@ -46,9 +46,7 @@ void mb_get_spd_map(uint8_t spd_map[4])
 	spd_map[2] = 0xa4;
 }
 
-void mainboard_fill_pei_data(struct pei_data *pei_data)
-{
-	struct usb2_port_setting usb2_ports[MAX_USB2_PORTS] = {
+	const struct usb2_port_setting mainboard_usb2_ports[MAX_USB2_PORTS] = {
 		/* Length, Enable, OCn#, Location */
 		{ 0x0064, 1, 0,               /* P0: VP8 */
 		  USB_PORT_MINI_PCIE },
@@ -68,14 +66,10 @@ void mainboard_fill_pei_data(struct pei_data *pei_data)
 		  USB_PORT_SKIP },
 	};
 
-	struct usb3_port_setting usb3_ports[MAX_USB3_PORTS] = {
+	const struct usb3_port_setting mainboard_usb3_ports[MAX_USB3_PORTS] = {
 		/* Enable, OCn# */
 		{ 1, 0 }, /* P1; CN22 */
 		{ 1, 1 }, /* P2; CN23  */
 		{ 1, 2 }, /* P3; CN25 */
 		{ 1, 2 }, /* P4; CN25 */
 	};
-
-	memcpy(pei_data->usb2_ports, usb2_ports, sizeof(usb2_ports));
-	memcpy(pei_data->usb3_ports, usb3_ports, sizeof(usb3_ports));
-}
diff --git a/src/mainboard/google/slippy/romstage.c b/src/mainboard/google/slippy/romstage.c
index 7f08a58aca..fb32b48e8e 100644
--- a/src/mainboard/google/slippy/romstage.c
+++ b/src/mainboard/google/slippy/romstage.c
@@ -46,8 +46,3 @@ void mb_get_spd_map(uint8_t spd_map[4])
 	spd_map[0] = 0xff;
 	spd_map[2] = 0xff;
 }
-
-void mainboard_fill_pei_data(struct pei_data *pei_data)
-{
-	variant_romstage_entry(pei_data);
-}
diff --git a/src/mainboard/google/slippy/variant.h b/src/mainboard/google/slippy/variant.h
index 2263f9d099..bfcf855848 100644
--- a/src/mainboard/google/slippy/variant.h
+++ b/src/mainboard/google/slippy/variant.h
@@ -3,6 +3,4 @@
 #ifndef VARIANT_H
 #define VARIANT_H
 
-void variant_romstage_entry(struct pei_data *pei_data);
-
 #endif
diff --git a/src/mainboard/google/slippy/variants/falco/romstage.c b/src/mainboard/google/slippy/variants/falco/romstage.c
index 516b26c9c5..de0ac76334 100644
--- a/src/mainboard/google/slippy/variants/falco/romstage.c
+++ b/src/mainboard/google/slippy/variants/falco/romstage.c
@@ -48,9 +48,7 @@ void copy_spd(struct pei_data *peid)
 	}
 }
 
-void variant_romstage_entry(struct pei_data *pei_data)
-{
-	struct usb2_port_setting usb2_ports[MAX_USB2_PORTS] = {
+	const struct usb2_port_setting mainboard_usb2_ports[MAX_USB2_PORTS] = {
 		/* Length, Enable, OCn#, Location */
 		{ 0x0064, 1, 0,               /* P0: Port A, CN8 */
 		  USB_PORT_BACK_PANEL },
@@ -70,14 +68,10 @@ void variant_romstage_entry(struct pei_data *pei_data)
 		  USB_PORT_INTERNAL },
 	};
 
-	struct usb3_port_setting usb3_ports[MAX_USB3_PORTS] = {
+	const struct usb3_port_setting mainboard_usb3_ports[MAX_USB3_PORTS] = {
 		/* Enable, OCn# */
 		{ 1, 0               }, /* P1; Port A, CN8 */
 		{ 1, 0               }, /* P2; Port B, CN9  */
 		{ 0, USB_OC_PIN_SKIP }, /* P3; */
 		{ 0, USB_OC_PIN_SKIP }, /* P4; */
 	};
-
-	memcpy(pei_data->usb2_ports, usb2_ports, sizeof(usb2_ports));
-	memcpy(pei_data->usb3_ports, usb3_ports, sizeof(usb3_ports));
-}
diff --git a/src/mainboard/google/slippy/variants/leon/romstage.c b/src/mainboard/google/slippy/variants/leon/romstage.c
index e24dcb9808..daf0c16604 100644
--- a/src/mainboard/google/slippy/variants/leon/romstage.c
+++ b/src/mainboard/google/slippy/variants/leon/romstage.c
@@ -44,9 +44,7 @@ void copy_spd(struct pei_data *peid)
 			spd_file + (spd_index * spd_len), spd_len);
 }
 
-void variant_romstage_entry(struct pei_data *pei_data)
-{
-	struct usb2_port_setting usb2_ports[MAX_USB2_PORTS] = {
+	const struct usb2_port_setting mainboard_usb2_ports[MAX_USB2_PORTS] = {
 		/* Length, Enable, OCn#, Location */
 		{ 0x0040, 1, 0,               /* P0: Port A, CN10 */
 		  USB_PORT_BACK_PANEL },
@@ -66,14 +64,10 @@ void variant_romstage_entry(struct pei_data *pei_data)
 		  USB_PORT_SKIP },
 	};
 
-	struct usb3_port_setting usb3_ports[MAX_USB3_PORTS] = {
+	const struct usb3_port_setting mainboard_usb3_ports[MAX_USB3_PORTS] = {
 		/* Enable, OCn# */
 		{ 1, 0               }, /* P1; Port A, CN10 */
 		{ 1, 2               }, /* P2; Port B, CN11 */
 		{ 0, USB_OC_PIN_SKIP }, /* P3; */
 		{ 0, USB_OC_PIN_SKIP }, /* P4; */
 	};
-
-	memcpy(pei_data->usb2_ports, usb2_ports, sizeof(usb2_ports));
-	memcpy(pei_data->usb3_ports, usb3_ports, sizeof(usb3_ports));
-}
diff --git a/src/mainboard/google/slippy/variants/peppy/romstage.c b/src/mainboard/google/slippy/variants/peppy/romstage.c
index 92e1e8dd5e..535c07b778 100644
--- a/src/mainboard/google/slippy/variants/peppy/romstage.c
+++ b/src/mainboard/google/slippy/variants/peppy/romstage.c
@@ -62,9 +62,7 @@ void copy_spd(struct pei_data *peid)
 	}
 }
 
-void variant_romstage_entry(struct pei_data *pei_data)
-{
-	struct usb2_port_setting usb2_ports[MAX_USB2_PORTS] = {
+	const struct usb2_port_setting mainboard_usb2_ports[MAX_USB2_PORTS] = {
 		/* Length, Enable, OCn#, Location */
 		{ 0x0150, 1, USB_OC_PIN_SKIP, /* P0: LTE */
 		  USB_PORT_MINI_PCIE },
@@ -84,14 +82,10 @@ void variant_romstage_entry(struct pei_data *pei_data)
 		  USB_PORT_SKIP },
 	};
 
-	struct usb3_port_setting usb3_ports[MAX_USB3_PORTS] = {
+	const struct usb3_port_setting mainboard_usb3_ports[MAX_USB3_PORTS] = {
 		/* Enable, OCn# */
 		{ 1, 0               }, /* P1; Port A, CN6 */
 		{ 0, USB_OC_PIN_SKIP }, /* P2; */
 		{ 0, USB_OC_PIN_SKIP }, /* P3; */
 		{ 0, USB_OC_PIN_SKIP }, /* P4; */
 	};
-
-	memcpy(pei_data->usb2_ports, usb2_ports, sizeof(usb2_ports));
-	memcpy(pei_data->usb3_ports, usb3_ports, sizeof(usb3_ports));
-}
diff --git a/src/mainboard/google/slippy/variants/wolf/romstage.c b/src/mainboard/google/slippy/variants/wolf/romstage.c
index a0b5055457..40ff9c2253 100644
--- a/src/mainboard/google/slippy/variants/wolf/romstage.c
+++ b/src/mainboard/google/slippy/variants/wolf/romstage.c
@@ -48,9 +48,7 @@ void copy_spd(struct pei_data *peid)
 	}
 }
 
-void variant_romstage_entry(struct pei_data *pei_data)
-{
-	struct usb2_port_setting usb2_ports[MAX_USB2_PORTS] = {
+	const struct usb2_port_setting mainboard_usb2_ports[MAX_USB2_PORTS] = {
 		/* Length, Enable, OCn#, Location */
 		{ 0x0040, 1, 0,               /* P0: Port A, CN10 */
 		  USB_PORT_BACK_PANEL },
@@ -70,14 +68,10 @@ void variant_romstage_entry(struct pei_data *pei_data)
 		  USB_PORT_SKIP  },
 	};
 
-	struct usb3_port_setting usb3_ports[MAX_USB3_PORTS] = {
+	const struct usb3_port_setting mainboard_usb3_ports[MAX_USB3_PORTS] = {
 		/* Enable, OCn# */
 		{ 1, 0               }, /* P1; Port A, CN10 */
 		{ 1, 2               }, /* P2; Port B, CN11  */
 		{ 0, USB_OC_PIN_SKIP }, /* P3; */
 		{ 0, USB_OC_PIN_SKIP }, /* P4; */
 	};
-
-	memcpy(pei_data->usb2_ports, usb2_ports, sizeof(usb2_ports));
-	memcpy(pei_data->usb3_ports, usb3_ports, sizeof(usb3_ports));
-}
diff --git a/src/mainboard/hp/folio_9480m/romstage.c b/src/mainboard/hp/folio_9480m/romstage.c
index 7eeb7bd747..0c4308be53 100644
--- a/src/mainboard/hp/folio_9480m/romstage.c
+++ b/src/mainboard/hp/folio_9480m/romstage.c
@@ -23,9 +23,7 @@ void mb_get_spd_map(uint8_t spd_map[4])
 	spd_map[2] = 0xa4;
 }
 
-void mainboard_fill_pei_data(struct pei_data *pei_data)
-{
-	struct usb2_port_setting usb2_ports[MAX_USB2_PORTS] = {
+	const struct usb2_port_setting mainboard_usb2_ports[MAX_USB2_PORTS] = {
 		/* Length, Enable, OCn#, Location */
 		{ 0x0080, 1, USB_OC_PIN_SKIP, USB_PORT_BACK_PANEL }, /* dock */
 		{ 0x0040, 1, USB_OC_PIN_SKIP, USB_PORT_BACK_PANEL }, /* left, EHCI debug */
@@ -36,12 +34,10 @@ void mainboard_fill_pei_data(struct pei_data *pei_data)
 		{ 0x0040, 1, USB_OC_PIN_SKIP, USB_PORT_BACK_PANEL }, /* Webcam */
 		{ 0x0040, 1, USB_OC_PIN_SKIP, USB_PORT_BACK_PANEL },
 	};
-	struct usb3_port_setting usb3_ports[MAX_USB3_PORTS] = {
+
+	const struct usb3_port_setting mainboard_usb3_ports[MAX_USB3_PORTS] = {
 		{ 1, USB_OC_PIN_SKIP }, /* dock */
 		{ 1, USB_OC_PIN_SKIP }, /* left */
 		{ 1, USB_OC_PIN_SKIP }, /* right */
 		{ 0, USB_OC_PIN_SKIP },
 	};
-	memcpy(pei_data->usb2_ports, usb2_ports, sizeof(usb2_ports));
-	memcpy(pei_data->usb3_ports, usb3_ports, sizeof(usb3_ports));
-}
diff --git a/src/mainboard/intel/baskingridge/romstage.c b/src/mainboard/intel/baskingridge/romstage.c
index 192751707a..9c4c9b7e77 100644
--- a/src/mainboard/intel/baskingridge/romstage.c
+++ b/src/mainboard/intel/baskingridge/romstage.c
@@ -49,9 +49,7 @@ void mb_get_spd_map(uint8_t spd_map[4])
 	spd_map[3] = 0xa6;
 }
 
-void mainboard_fill_pei_data(struct pei_data *pei_data)
-{
-	struct usb2_port_setting usb2_ports[MAX_USB2_PORTS] = {
+	const struct usb2_port_setting mainboard_usb2_ports[MAX_USB2_PORTS] = {
 		/* Length, Enable, OCn#, Location */
 		{ 0x0040, 1, 0, /* P0: Back USB3 port  (OC0) */
 		  USB_PORT_BACK_PANEL },
@@ -83,7 +81,7 @@ void mainboard_fill_pei_data(struct pei_data *pei_data)
 		  USB_PORT_FRONT_PANEL },
 	};
 
-	struct usb3_port_setting usb3_ports[MAX_USB3_PORTS] = {
+	const struct usb3_port_setting mainboard_usb3_ports[MAX_USB3_PORTS] = {
 		/* Enable, OCn# */
 		{ 1, 0 }, /* P1; */
 		{ 1, 0 }, /* P2; */
@@ -92,7 +90,3 @@ void mainboard_fill_pei_data(struct pei_data *pei_data)
 		{ 1, 0 }, /* P6; */
 		{ 1, 0 }, /* P6; */
 	};
-
-	memcpy(pei_data->usb2_ports, usb2_ports, sizeof(usb2_ports));
-	memcpy(pei_data->usb3_ports, usb3_ports, sizeof(usb3_ports));
-}
diff --git a/src/mainboard/lenovo/t440p/romstage.c b/src/mainboard/lenovo/t440p/romstage.c
index 3e5cc0d65d..eaee7348f1 100644
--- a/src/mainboard/lenovo/t440p/romstage.c
+++ b/src/mainboard/lenovo/t440p/romstage.c
@@ -46,9 +46,7 @@ void mb_get_spd_map(uint8_t spd_map[4])
 	spd_map[2] = 0xa2;
 }
 
-void mainboard_fill_pei_data(struct pei_data *pei_data)
-{
-	struct usb2_port_setting usb2_ports[MAX_USB2_PORTS] = {
+	const struct usb2_port_setting mainboard_usb2_ports[MAX_USB2_PORTS] = {
 		/* Length, Enable, OCn#, Location */
 		{ 0x0040, 1, 0, USB_PORT_BACK_PANEL }, /* USB3 */
 		{ 0x0040, 1, 0, USB_PORT_BACK_PANEL }, /* USB3 */
@@ -66,7 +64,7 @@ void mainboard_fill_pei_data(struct pei_data *pei_data)
 		{ 0x0040, 1, 6, USB_PORT_BACK_PANEL },
 	};
 
-	struct usb3_port_setting usb3_ports[MAX_USB3_PORTS] = {
+	const struct usb3_port_setting mainboard_usb3_ports[MAX_USB3_PORTS] = {
 		{ 1, 0 },
 		{ 1, 0 },
 		{ 1, USB_OC_PIN_SKIP },
@@ -74,7 +72,3 @@ void mainboard_fill_pei_data(struct pei_data *pei_data)
 		{ 1, 1 },
 		{ 1, 1 }, /* WWAN */
 	};
-
-	memcpy(pei_data->usb2_ports, usb2_ports, sizeof(usb2_ports));
-	memcpy(pei_data->usb3_ports, usb3_ports, sizeof(usb3_ports));
-}
diff --git a/src/mainboard/msi/h81m-p33/romstage.c b/src/mainboard/msi/h81m-p33/romstage.c
index 6321eeba4a..56c77cdf8c 100644
--- a/src/mainboard/msi/h81m-p33/romstage.c
+++ b/src/mainboard/msi/h81m-p33/romstage.c
@@ -23,9 +23,7 @@ void mb_get_spd_map(uint8_t spd_map[4])
 	spd_map[2] = 0xa4;
 }
 
-void mainboard_fill_pei_data(struct pei_data *pei_data)
-{
-	struct usb2_port_setting usb2_ports[MAX_USB2_PORTS] = {
+	const struct usb2_port_setting mainboard_usb2_ports[MAX_USB2_PORTS] = {
 		/* Length, Enable, OCn#, Location */
 		{ 0x0040, 1, 0, USB_PORT_BACK_PANEL },
 		{ 0x0040, 1, 0, USB_PORT_BACK_PANEL },
@@ -43,7 +41,7 @@ void mainboard_fill_pei_data(struct pei_data *pei_data)
 		{ 0x0040, 1, 6, USB_PORT_BACK_PANEL },
 	};
 
-	struct usb3_port_setting usb3_ports[MAX_USB3_PORTS] = {
+	const struct usb3_port_setting mainboard_usb3_ports[MAX_USB3_PORTS] = {
 		{ 1, 0 },
 		{ 1, 0 },
 		{ 1, 1 },
@@ -51,7 +49,3 @@ void mainboard_fill_pei_data(struct pei_data *pei_data)
 		{ 1, 2 },
 		{ 1, 2 },
 	};
-
-	memcpy(pei_data->usb2_ports, usb2_ports, sizeof(usb2_ports));
-	memcpy(pei_data->usb3_ports, usb3_ports, sizeof(usb3_ports));
-}
diff --git a/src/mainboard/supermicro/x10slm-f/romstage.c b/src/mainboard/supermicro/x10slm-f/romstage.c
index c9f1027e30..a2798d9040 100644
--- a/src/mainboard/supermicro/x10slm-f/romstage.c
+++ b/src/mainboard/supermicro/x10slm-f/romstage.c
@@ -25,9 +25,7 @@ void mb_get_spd_map(uint8_t spd_map[4])
 	spd_map[3] = 0xa6;
 }
 
-void mainboard_fill_pei_data(struct pei_data *pei_data)
-{
-	struct usb2_port_setting usb2_ports[MAX_USB2_PORTS] = {
+	const struct usb2_port_setting mainboard_usb2_ports[MAX_USB2_PORTS] = {
 		/* Length, Enable, OCn#, Location */
 		{ 0x0040, 1, 0, USB_PORT_INTERNAL },
 		{ 0x0040, 1, 0, USB_PORT_BACK_PANEL },
@@ -45,7 +43,7 @@ void mainboard_fill_pei_data(struct pei_data *pei_data)
 		{ 0x0040, 1, 6, USB_PORT_BACK_PANEL },
 	};
 
-	struct usb3_port_setting usb3_ports[MAX_USB3_PORTS] = {
+	const struct usb3_port_setting mainboard_usb3_ports[MAX_USB3_PORTS] = {
 		/* Enable, OCn# */
 		{ 1, 1 },
 		{ 1, 1 },
@@ -54,7 +52,3 @@ void mainboard_fill_pei_data(struct pei_data *pei_data)
 		{ 1, 3 },
 		{ 1, 3 },
 	};
-
-	memcpy(pei_data->usb2_ports, usb2_ports, sizeof(usb2_ports));
-	memcpy(pei_data->usb3_ports, usb3_ports, sizeof(usb3_ports));
-}
diff --git a/src/northbridge/intel/haswell/raminit.h b/src/northbridge/intel/haswell/raminit.h
index adf53ea4b4..ee0af776a9 100644
--- a/src/northbridge/intel/haswell/raminit.h
+++ b/src/northbridge/intel/haswell/raminit.h
@@ -6,15 +6,16 @@
 #include <stdint.h>
 #include "pei_data.h"
 
+/* Mainboard-specific USB configuration */
+extern const struct usb2_port_setting mainboard_usb2_ports[MAX_USB2_PORTS];
+extern const struct usb3_port_setting mainboard_usb3_ports[MAX_USB3_PORTS];
+
 /* Optional function to copy SPD data for on-board memory */
 void copy_spd(struct pei_data *peid);
 
 /* Mainboard callback to fill in the SPD addresses in MRC format */
 void mb_get_spd_map(uint8_t spd_map[4]);
 
-/* Necessary function to initialize pei_data with mainboard-specific settings */
-void mainboard_fill_pei_data(struct pei_data *pei_data);
-
 void sdram_initialize(struct pei_data *pei_data);
 void setup_sdram_meminfo(struct pei_data *pei_data);
 int fixup_haswell_errata(void);
diff --git a/src/northbridge/intel/haswell/romstage.c b/src/northbridge/intel/haswell/romstage.c
index cbb9834763..b77e559801 100644
--- a/src/northbridge/intel/haswell/romstage.c
+++ b/src/northbridge/intel/haswell/romstage.c
@@ -18,6 +18,7 @@
 #include <northbridge/intel/haswell/raminit.h>
 #include <southbridge/intel/lynxpoint/pch.h>
 #include <southbridge/intel/lynxpoint/me.h>
+#include <string.h>
 
 /* Copy SPD data for on-board memory */
 void __weak copy_spd(struct pei_data *peid)
@@ -70,7 +71,8 @@ void mainboard_romstage_entry(void)
 		.usb_xhci_on_resume	= cfg->usb_xhci_on_resume,
 	};
 
-	mainboard_fill_pei_data(&pei_data);
+	memcpy(pei_data.usb2_ports, mainboard_usb2_ports, sizeof(mainboard_usb2_ports));
+	memcpy(pei_data.usb3_ports, mainboard_usb3_ports, sizeof(mainboard_usb3_ports));
 
 	enable_lapic();