diff options
| author | Andrey Petrov <andrey.petrov@intel.com> | 2016-02-12 13:26:57 -0800 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-02-16 22:45:48 +0100 |
| commit | 32d3995587d926ae19a71151d119094b7ffc281c (patch) | |
| tree | f20df20d9a7b282e63df2469aa618470c7c9b5d3 | |
| parent | 647e34dbe547bcd7bb3990d138b5c6906ea935e8 (diff) | |
soc/intel/apollolake: bootblock: implement platform_prog_run()
Once bootblock copied romstage into CAR it may not jump into it right
away. This is because we are in NEM mode, there is no backing store
and a miss in L1 may cause L1D line snoop that gets written back. The
solution is to flush L1D to L2 so snoop guaranteed to hit L2.
Change-Id: I2ffe46dbfdfe7f0ccd38b34ff203ff76b6d5755b
Signed-off-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-on: https://review.coreboot.org/13703
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
| -rw-r--r-- | src/soc/intel/apollolake/bootblock/bootblock.c | 10 | ||||
| -rw-r--r-- | src/soc/intel/apollolake/include/soc/cpu.h | 1 |
2 files changed, 11 insertions, 0 deletions
diff --git a/src/soc/intel/apollolake/bootblock/bootblock.c b/src/soc/intel/apollolake/bootblock/bootblock.c index d3a78e106f..500761315b 100644 --- a/src/soc/intel/apollolake/bootblock/bootblock.c +++ b/src/soc/intel/apollolake/bootblock/bootblock.c @@ -12,7 +12,9 @@ #include <arch/cpu.h> #include <bootblock_common.h> #include <device/pci.h> +#include <program_loading.h> #include <soc/bootblock.h> +#include <soc/cpu.h> #include <soc/northbridge.h> #include <soc/pci_devs.h> @@ -32,3 +34,11 @@ void asmlinkage bootblock_c_entry(void) /* Call lib/bootblock.c main */ main(); } + +void platform_prog_run(struct prog *prog) +{ + /* Flush L1D cache to L2 */ + msr_t msr = rdmsr(MSR_POWER_MISC); + msr.lo |= (1 << 8); + wrmsr(MSR_POWER_MISC, msr); +} diff --git a/src/soc/intel/apollolake/include/soc/cpu.h b/src/soc/intel/apollolake/include/soc/cpu.h index bee58b206e..870f474c87 100644 --- a/src/soc/intel/apollolake/include/soc/cpu.h +++ b/src/soc/intel/apollolake/include/soc/cpu.h @@ -18,6 +18,7 @@ #define CPUID_APOLLOLAKE_A0 0x506c8 #define MSR_PLATFORM_INFO 0xce +#define MSR_POWER_MISC 0x120 #define BASE_CLOCK_MHZ 100 |