summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorJohn Su <john_su@compal.corp-partner.google.com>2018-08-09 14:15:08 +0800
committerPatrick Georgi <pgeorgi@google.com>2018-08-13 12:21:01 +0000
commit31c2ccacf6c89ab065631acc1336b94b224c56bd (patch)
treed986718eb293a0cf62c9cc951caeda48c988227d
parent217ecd112b3766f6dd56b8b1ffbd0cf54c44ea4a (diff)
mb/google/octopus/variants/fleex: Set up DPTF table
Follow thermal table (b:112274477 comment#1) for first tunning. BUG=b:112274477 TEST=Match the result from DPTF UI. Change-Id: I63b2e50a4f6fc5453e6564e277600498ac0e6244 Signed-off-by: John Su <john_su@compal.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/27969 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
-rw-r--r--src/mainboard/google/octopus/variants/fleex/include/variant/acpi/dptf.asl59
1 files changed, 58 insertions, 1 deletions
diff --git a/src/mainboard/google/octopus/variants/fleex/include/variant/acpi/dptf.asl b/src/mainboard/google/octopus/variants/fleex/include/variant/acpi/dptf.asl
index cc17d560cf..a60ad1ccb0 100644
--- a/src/mainboard/google/octopus/variants/fleex/include/variant/acpi/dptf.asl
+++ b/src/mainboard/google/octopus/variants/fleex/include/variant/acpi/dptf.asl
@@ -13,4 +13,61 @@
* GNU General Public License for more details.
*/
-#include <baseboard/acpi/dptf.asl>
+#define DPTF_CPU_PASSIVE 90
+#define DPTF_CPU_CRITICAL 127
+
+#define DPTF_TSR1_SENSOR_ID 1
+#define DPTF_TSR1_SENSOR_NAME "Ambient"
+#define DPTF_TSR1_PASSIVE 90
+#define DPTF_TSR1_CRITICAL 127
+
+#define DPTF_TSR2_SENSOR_ID 2
+#define DPTF_TSR2_SENSOR_NAME "Charger"
+#define DPTF_TSR2_PASSIVE 90
+#define DPTF_TSR2_CRITICAL 127
+
+#define DPTF_ENABLE_CHARGER
+
+/* Charger performance states, board-specific values from charger and EC */
+Name (CHPS, Package () {
+ Package () { 0, 0, 0, 0, 255, 0xBB8, "mA", 0 }, /* 3A (MAX) */
+ Package () { 0, 0, 0, 0, 24, 0x600, "mA", 0 }, /* 1.5A */
+ Package () { 0, 0, 0, 0, 16, 0x400, "mA", 0 }, /* 1.0A */
+ Package () { 0, 0, 0, 0, 8, 0x200, "mA", 0 }, /* 0.5A */
+ Package () { 0, 0, 0, 0, 0, 0x000, "mA", 0 }, /* 0.0A */
+})
+
+Name (DTRT, Package () {
+ /* CPU Throttle Effect on CPU */
+ Package () { \_SB.PCI0.TCPU, \_SB.PCI0.TCPU, 500, 10, 0, 0, 0, 0 },
+
+ /* CPU Effect on Temp Sensor 1 */
+ Package () { \_SB.PCI0.TCPU, \_SB.DPTF.TSR1, 500, 10, 0, 0, 0, 0 },
+
+#ifdef DPTF_ENABLE_CHARGER
+ /* Charger Effect on Temp Sensor 2 */
+ Package () { \_SB.PCI0.TCPU, \_SB.DPTF.TSR2, 500, 10, 0, 0, 0, 0 },
+#endif
+})
+
+Name (MPPC, Package ()
+{
+ 0x2, /* Revision */
+ Package () { /* Power Limit 1 */
+ 0, /* PowerLimitIndex, 0 for Power Limit 1 */
+ 3000, /* PowerLimitMinimum */
+ 4500, /* PowerLimitMaximum */
+ 1000, /* TimeWindowMinimum */
+ 1000, /* TimeWindowMaximum */
+ 500 /* StepSize */
+ },
+
+ Package () { /* Power Limit 2 */
+ 1, /* PowerLimitIndex, 1 for Power Limit 2 */
+ 15000, /* PowerLimitMinimum */
+ 15000, /* PowerLimitMaximum */
+ 1000, /* TimeWindowMinimum */
+ 1000, /* TimeWindowMaximum */
+ 500 /* StepSize */
+ }
+})