diff options
| author | Maulik V Vaghela <maulik.v.vaghela@intel.com> | 2021-05-10 15:25:50 +0530 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-05-18 10:00:35 +0000 |
| commit | 2b97ea153a4f7fa0d495d65c9c1f8e84896ee586 (patch) | |
| tree | 35594cb6f7401c052acccb4fe9f784cf4433c83e | |
| parent | 1965f650eaa06affa6a2febe5b6cb302d3f981a1 (diff) | |
mb/intel/adlrvp: Disable EC sync for adlrvp_ext_ec
Since we have TPM disabled on ADLRVP, if we enable EC sync, it keeps
rebooting with hash error.
Change-Id: I62a4fceb83dc6b20f699b4662e8f421aadafdee5
Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54016
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
| -rw-r--r-- | src/mainboard/intel/adlrvp/Kconfig | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/intel/adlrvp/Kconfig b/src/mainboard/intel/adlrvp/Kconfig index ce5665c567..a40e9e6a9f 100644 --- a/src/mainboard/intel/adlrvp/Kconfig +++ b/src/mainboard/intel/adlrvp/Kconfig @@ -27,6 +27,7 @@ config CHROMEOS select GBB_FLAG_FORCE_MANUAL_RECOVERY select GBB_FLAG_DISABLE_PD_SOFTWARE_SYNC select HAS_RECOVERY_MRC_CACHE + select GBB_FLAG_DISABLE_EC_SOFTWARE_SYNC config MAINBOARD_DIR string @@ -85,7 +86,6 @@ config ADL_CHROME_EC config ADL_INTEL_EC bool "Intel EC" select EC_ACPI - select GBB_FLAG_DISABLE_EC_SOFTWARE_SYNC if VBOOT endchoice config VBOOT |