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authorAngel Pons <th3fanbus@gmail.com>2019-12-31 14:24:12 +0100
committerFelix Held <felix-coreboot@felixheld.de>2020-01-01 16:10:10 +0000
commit2a9a49b7ba0d43eaa54af089966bf6859d05ac28 (patch)
tree72cbc37b6b402691c5c6687c6f28696e35d1e3a8
parent50b7ed2bbe2a4b6bc7dd880648c4836c0812845c (diff)
nb/intel/sandybridge: Make `PM_PDWN_Config` uppercase
Change-Id: Id37d2367d57ff925476c53bb0edab927c1c768f6 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38028 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
-rw-r--r--src/northbridge/intel/sandybridge/raminit_common.c4
-rw-r--r--src/northbridge/intel/sandybridge/sandybridge.h2
2 files changed, 3 insertions, 3 deletions
diff --git a/src/northbridge/intel/sandybridge/raminit_common.c b/src/northbridge/intel/sandybridge/raminit_common.c
index 3cc9d298d7..644c4154dc 100644
--- a/src/northbridge/intel/sandybridge/raminit_common.c
+++ b/src/northbridge/intel/sandybridge/raminit_common.c
@@ -3134,10 +3134,10 @@ void final_registers(ramctr_timing * ctrl)
if (is_mobile)
/* APD - DLL Off, 64 DCLKs until idle, decision per rank */
- MCHBAR32(PM_PDWN_Config) = 0x00000740;
+ MCHBAR32(PM_PDWN_CONFIG) = 0x00000740;
else
/* APD - PPD, 64 DCLKs until idle, decision per rank */
- MCHBAR32(PM_PDWN_Config) = 0x00000340;
+ MCHBAR32(PM_PDWN_CONFIG) = 0x00000340;
FOR_ALL_CHANNELS
MCHBAR32(0x4380 + 0x400 * channel) = 0x00000aaa;
diff --git a/src/northbridge/intel/sandybridge/sandybridge.h b/src/northbridge/intel/sandybridge/sandybridge.h
index 725cc04c2c..3e09fd9a89 100644
--- a/src/northbridge/intel/sandybridge/sandybridge.h
+++ b/src/northbridge/intel/sandybridge/sandybridge.h
@@ -133,7 +133,7 @@ enum platform_type {
#define SC_IO_LATENCY_C0 0x4028 /* IO Latency Configuration */
#define TC_RFP_C0 0x4294 /* Refresh Parameters */
#define TC_RFTP_C0 0x4298 /* Refresh Timing Parameters */
-#define PM_PDWN_Config 0x4cb0
+#define PM_PDWN_CONFIG 0x4cb0
#define MAD_CHNL 0x5000 /* Address Decoder Channel Configuration */
#define MAD_DIMM_CH0 0x5004 /* Address Decode Channel 0 */
#define MAD_DIMM_CH1 0x5008 /* Address Decode Channel 1 */