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authorCliff Huang <cliff.huang@intel.com>2022-02-09 18:10:06 -0800
committerFelix Held <felix-coreboot@felixheld.de>2022-02-18 23:23:27 +0000
commit23f33546bb558fe272e15996076547f998e52746 (patch)
tree9d929054780deb7e396276dbb5b3a607b8f3f994
parenta1f5ad084966a400b7c2df33b2de857afdcbfc51 (diff)
mb/google/brya: remove the delay from for WWAN _ON method.
Remove unecessary delay in RTD3 _ON Method after PERST# dessartion. TEST: 2022-02-10T18:22:53.204391Z INFO kernel: [ 0.190287] ACPI: Power Resource [RTD3] (on) 2022-02-10T18:22:53.204395Z INFO kernel: [ 0.194252] ACPI: Power Resource [RTD3] (off) Signed-off-by: Cliff Huang <cliff.huang@intel.com> Change-Id: I9bc36af6e6c944fcd3de23b7d49640ad9d25642d Reviewed-on: https://review.coreboot.org/c/coreboot/+/61783 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Anil Kumar K <anil.kumar.k@intel.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Bora Guvendik <bora.guvendik@intel.com>
-rw-r--r--src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb
index 0c0e8c41d4..6ac796af1f 100644
--- a/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb
+++ b/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb
@@ -155,7 +155,6 @@ chip soc/intel/alderlake
chip soc/intel/common/block/pcie/rtd3
register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E0)"
register "reset_off_delay_ms" = "20"
- register "reset_delay_ms" = "1000"
register "srcclk_pin" = "5"
register "ext_pm_support" = "ACPI_PCIE_RP_EMIT_ALL"
register "skip_on_off_support" = "true"