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authorFrançois-Regis Vuillemin <coreboot@miradou.com>2009-06-27 02:23:26 +0000
committerUwe Hermann <uwe@hermann-uwe.de>2009-06-27 02:23:26 +0000
commit22b44ba9c3672115bfe90ff9b218553959743b6e (patch)
treef34a52a71a5a2c92f5eaf9a21db1a10da7d80e90
parentdb52fb802471e5bde26a338ec1afbf8164da87f9 (diff)
Add dump support for SMSC LPC47N252.
Signed-off-by: François-Regis Vuillemin <coreboot@miradou.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4375 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
-rw-r--r--util/superiotool/smsc.c39
1 files changed, 39 insertions, 0 deletions
diff --git a/util/superiotool/smsc.c b/util/superiotool/smsc.c
index d748a9296e..36035e2fab 100644
--- a/util/superiotool/smsc.c
+++ b/util/superiotool/smsc.c
@@ -109,6 +109,45 @@ static const struct superio_registers reg_table[] = {
{0x00,0x00,0x00,EOT}},
{EOT}}},
{0x0e, "LPC47N252", { /* From sensors-detect */
+ {NOLDN, NULL,
+ {0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,
+ 0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,EOT},
+ {0x0e,NANA,0x00,0x00,0x04,0x04,NANA,NANA,0x00,
+ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,EOT}},
+ {0x0, "Floppy",
+ {0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,0xf2,0xf3,0xf4,
+ 0xf5,EOT},
+ {0x00,0x03,0xf0,0x06,0x02,0x0e,0x00,0xff,RSVD,0x00,
+ 0x00,EOT}},
+ {0x1, "Power management (PM1)",
+ {0x30,0x60,0x61,EOT},
+ {0x00,0x00,0x00,EOT}},
+ {0x3, "Parallel port",
+ {0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,EOT},
+ {0x00,0x00,0x00,0x00,0x04,0x3c,0x00,EOT}},
+ {0x4, "COM1",
+ {0x30,0x60,0x61,0x70,0xf0,EOT},
+ {0x00,0x00,0x00,0x00,0x00,EOT}},
+ {0x5, "COM2 / IRCC",
+ {0x30,0x60,0x61,0x62,0x63,0x70,0x74,0xf0,0xf1,
+ 0xf2,0xf7,0xf8,EOT},
+ {0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x02,
+ 0x03,0x00,0x00,EOT}},
+ {0x6, "Real-time clock (RTC)",
+ {0x30,0x60,0x61,0x62,0x63,0x70,0xf0,0xf1,EOT},
+ {0x00,0x00,0x70,0x00,0x74,0x00,0x00,NANA,EOT}},
+ {0x7, "Keyboard",
+ {0x30,0x60,0x61,0x70,0x72,0xf0,EOT},
+ {0x00,0x00,0x00,0x00,0x00,0x00,EOT}},
+ {0x8, "Embedded controller (EC)",
+ {0x30,0x60,0x61,EOT},
+ {0x00,0x00,0x62,EOT}},
+ {0x9, "Mailbox Interface",
+ {0x30,0x60,0x61,EOT},
+ {0x00,0x00,0x00,EOT}},
+ {0xa, "LPC/8051 addressable GPIO (LGPIO)",
+ {0x30,0x60,0x61,EOT},
+ {0x00,0x00,0x00,EOT}},
{EOT}}},
{0x14, "LPC47M172", {
{EOT}}},