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authorNick Vaccaro <nvaccaro@google.com>2020-10-01 19:06:17 -0700
committerDuncan Laurie <dlaurie@chromium.org>2020-10-08 15:30:28 +0000
commit20be04a15376fb563222bad78632971e78621780 (patch)
tree11e7984e2ce5a87d23052986a09202aa04927204
parent799437578ab29ba5451a7312e3f256d39decf06a (diff)
mb/google/volteer: disable TBT if no USB4 hardware available
Implement mainboard_silicon_init_params() to allow for disabling of TBT root ports if the device does not have usb4 hardware. Add code to mainboard_memory_init_params() to disable memory-related settings associated with TBT in cases where no usb4 is available. BUG=b:167983038 TEST=none Change-Id: Iab23c07e15f754ca807f128b9edad7fdc9a44b9d Signed-off-by: Nick Vaccaro <nvaccaro@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45946 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
-rw-r--r--src/mainboard/google/volteer/mainboard.c15
-rw-r--r--src/mainboard/google/volteer/romstage.c8
2 files changed, 23 insertions, 0 deletions
diff --git a/src/mainboard/google/volteer/mainboard.c b/src/mainboard/google/volteer/mainboard.c
index 23c3e92569..1fcd5eb5ac 100644
--- a/src/mainboard/google/volteer/mainboard.c
+++ b/src/mainboard/google/volteer/mainboard.c
@@ -78,6 +78,21 @@ static void mainboard_chip_init(void *chip_info)
override_pads, override_num);
}
+void mainboard_silicon_init_params(FSP_S_CONFIG *params)
+{
+ bool has_usb4;
+
+ /* If device doesn't have USB4 hardware, disable tbt */
+ has_usb4 = (fw_config_probe(FW_CONFIG(DB_USB, USB4_GEN2)) ||
+ fw_config_probe(FW_CONFIG(DB_USB, USB4_GEN3)));
+
+ if (!has_usb4)
+ memset(params->ITbtPcieRootPortEn,
+ 0,
+ ARRAY_SIZE(params->ITbtPcieRootPortEn) *
+ sizeof(*params->ITbtPcieRootPortEn));
+}
+
struct chip_operations mainboard_ops = {
.init = mainboard_chip_init,
.enable_dev = mainboard_enable,
diff --git a/src/mainboard/google/volteer/romstage.c b/src/mainboard/google/volteer/romstage.c
index 720ab7f3a1..315ec2004a 100644
--- a/src/mainboard/google/volteer/romstage.c
+++ b/src/mainboard/google/volteer/romstage.c
@@ -27,4 +27,12 @@ void mainboard_memory_init_params(FSPM_UPD *mupd)
mem_cfg->PchHdaEnable = 0;
meminit_ddr(mem_cfg, board_cfg, &spd_info, half_populated);
+
+ /* Disable TBT if no USB4 hardware */
+ if (!(fw_config_probe(FW_CONFIG(DB_USB, USB4_GEN2)) ||
+ fw_config_probe(FW_CONFIG(DB_USB, USB4_GEN3)))) {
+ mem_cfg->TcssDma0En = 0;
+ mem_cfg->TcssItbtPcie0En = 0;
+ mem_cfg->TcssItbtPcie1En = 0;
+ }
}