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author | Karthikeyan Ramasubramanian <kramasub@google.com> | 2020-06-17 00:12:31 -0600 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2020-06-18 08:32:03 +0000 |
commit | 203af604644abc156acac61da3fe8c280639cd3a (patch) | |
tree | 19713061c8e52b6ce94593b6aefd06dbf7eb04be | |
parent | 0be23eda13a37202d21af6db346650896c3a60bd (diff) |
soc/intel/cannonlake: Enable FSP-S compression
Use LZMA compression technique to compress FSP-S. This provides some
SPI ROM space savings(~27 KiB) in each CBFS. FSP-M is XIP and hence not
compressed. LZMA is chosen over LZ4 since it provides extra space
savings of ~1 KiB for the decompression overhead of ~7 ms.
LZMA Compression:
fsps.bin 0xd1fc0 fsp 190132 LZMA (217088 decompressed)
LZMA Decompression:
15:starting LZMA decompress (ignore for x86) 343,289 (417)
16:finished LZMA decompress (ignore for x86) 373,922 (30,632)
LZ4 Compression:
fsps.bin 0xd1fc0 fsp 191310 LZ4 (217088 decompressed)
LZ4 Decompression:
17:starting LZ4 decompress (ignore for x86) 345,676 (581)
18:finished LZ4 decompress (ignore for x86) 369,101 (23,424)
BUG=b:158034451
TEST=Build and boot helios mainboard.
Change-Id: Ic0d0d81c81eaa365f3dbfdd2e00ac76cea287387
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42446
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r-- | src/soc/intel/cannonlake/Kconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig index 6ec3f02e00..fc7fb460d0 100644 --- a/src/soc/intel/cannonlake/Kconfig +++ b/src/soc/intel/cannonlake/Kconfig @@ -67,6 +67,7 @@ config CPU_SPECIFIC_OPTIONS select CACHE_MRC_SETTINGS select CPU_INTEL_COMMON select CPU_INTEL_FIRMWARE_INTERFACE_TABLE + select FSP_COMPRESS_FSP_S_LZMA select FSP_M_XIP select GENERIC_GPIO_LIB select HAVE_FSP_GOP |