diff options
| author | Vadim Bendebury <vbendeb@chromium.org> | 2014-05-28 10:49:51 -0700 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2015-01-03 05:02:07 +0100 |
| commit | 1485c3040b1c4ab4b204ebaae94e2023ff30db1b (patch) | |
| tree | 5a01413fdd183e6a090ea71396059d28cd11f02a | |
| parent | 2c04117eac0dbe5389af77abf9d550c73facc402 (diff) | |
storm: modify memory layout
This is an interim change (before EFS is enabled), align ROM and RAM
stages so that they have enough room and do not step over each other.
BUG=chrome-os-partner:27784
TEST=manual
. booted coreboot successfully on ap148
Original-Change-Id: I6e1710ac7ca494a69aea5ba3b117bfd882aded26
Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/202046
Original-Reviewed-by: David Hendricks <dhendrix@chromium.org>
Original-Reviewed-by: Trevor Bourget <tbourget@codeaurora.org>
(cherry picked from commit f1fd4e3f9d699cc694cf7840c169db9bbe9193b6)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Change-Id: I9861d34a8bdd6963afbeed7fca7fda8a891ec481
Reviewed-on: http://review.coreboot.org/8012
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
| -rw-r--r-- | src/soc/qualcomm/ipq806x/Kconfig | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/qualcomm/ipq806x/Kconfig b/src/soc/qualcomm/ipq806x/Kconfig index 3752c166a6..19d5236546 100644 --- a/src/soc/qualcomm/ipq806x/Kconfig +++ b/src/soc/qualcomm/ipq806x/Kconfig @@ -44,11 +44,11 @@ config BOOTBLOCK_BASE config ROMSTAGE_BASE hex - default 0x40608000 + default 0x40620000 config RAMSTAGE_BASE hex - default 0x4060c000 + default 0x40640000 config SYS_SDRAM_BASE hex |