diff options
| author | Yidi Lin <yidilin@chromium.org> | 2024-09-19 10:06:34 +0800 |
|---|---|---|
| committer | Yu-Ping Wu <yupingso@google.com> | 2024-11-06 04:00:11 +0000 |
| commit | 1121a7b9cc0566a76084d63e9c9ea8352711e31c (patch) | |
| tree | db2c0206d730b1f209357475177a496c0226cd15 | |
| parent | d38ed1504ad4f48efd965e01aa1c159bfd1f1353 (diff) | |
mb/google/rauru: Complete PCIe reset in romstage
De-assert PERST# at romstage to reduce the waiting time in ramstage.
BUG=b:361728592
TEST=The boot time improves 62ms
Change-Id: I2cd5cd59e7513b6e4036c3e8013a3c7322d2f787
Signed-off-by: Yidi Lin <yidilin@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84895
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Yidi Lin <yidilin@google.com>
| -rw-r--r-- | src/mainboard/google/rauru/romstage.c | 4 | ||||
| -rw-r--r-- | src/soc/mediatek/mt8196/Makefile.mk | 1 |
2 files changed, 5 insertions, 0 deletions
diff --git a/src/mainboard/google/rauru/romstage.c b/src/mainboard/google/rauru/romstage.c index 0db6fd2674..7ee8759f75 100644 --- a/src/mainboard/google/rauru/romstage.c +++ b/src/mainboard/google/rauru/romstage.c @@ -1,8 +1,12 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <arch/stages.h> +#include <soc/pcie.h> void platform_romstage_main(void) { /* TODO: add romstage main function */ + + if (CONFIG(PCI)) + mtk_pcie_deassert_perst(); } diff --git a/src/soc/mediatek/mt8196/Makefile.mk b/src/soc/mediatek/mt8196/Makefile.mk index df72ba65b9..809f3dc94a 100644 --- a/src/soc/mediatek/mt8196/Makefile.mk +++ b/src/soc/mediatek/mt8196/Makefile.mk @@ -16,6 +16,7 @@ bootblock-$(CONFIG_PCI) += ../common/pcie.c pcie.c bootblock-y += ../common/wdt.c ../common/wdt_req.c wdt.c romstage-y += ../common/cbmem.c +romstage-$(CONFIG_PCI) += ../common/early_init.c ../common/pcie.c romstage-y += emi.c romstage-y += l2c_ops.c romstage-y += ../common/mmu_operations.c ../common/mmu_cmops.c |