diff options
| author | Weimin Wu <wuweimin@huaqin.corp-partner.google.com> | 2023-11-18 12:03:40 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-12-01 16:35:37 +0000 |
| commit | 10db71310041e511660e0e80e0b3b4723a697996 (patch) | |
| tree | fc182e53a6a6626ad4f900cad13027db5216a325 | |
| parent | 0cf76cfabeefe67302edc814effb75a6e01a5b1a (diff) | |
mb/google/nissa/var/anraggar: Enable ILITEK touchscreen
For proto PCB:
GPP_C0 for enable power supply which also for sensor subsystem.
GPP_C0 must allways turn power on, so GPP_C6 is not only used
for enable function but also for stop report.
BUG=b:304920262
TEST=1. touchscreen function workable
2. INT pin no active during suspend
Change-Id: I7dabf205dba616f57ef9717f950eba96282d8e3d
Signed-off-by: Weimin Wu <wuweimin@huaqin.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79164
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <ericllai@google.com>
Reviewed-by: Dolan Liu <liuyong5@huaqin.corp-partner.google.com>
| -rw-r--r-- | src/mainboard/google/brya/variants/anraggar/gpio.c | 5 | ||||
| -rw-r--r-- | src/mainboard/google/brya/variants/anraggar/overridetree.cb | 6 |
2 files changed, 8 insertions, 3 deletions
diff --git a/src/mainboard/google/brya/variants/anraggar/gpio.c b/src/mainboard/google/brya/variants/anraggar/gpio.c index b01bc2c674..40505bde59 100644 --- a/src/mainboard/google/brya/variants/anraggar/gpio.c +++ b/src/mainboard/google/brya/variants/anraggar/gpio.c @@ -71,6 +71,11 @@ static const struct pad_config override_gpio_table[] = { /* Early pad configuration in bootblock */ static const struct pad_config early_gpio_table[] = { + /* C0 : SMBCLK ==> EN_PP3300_TCHSCR_X */ + PAD_CFG_GPO(GPP_C0, 1, DEEP), + /* C1 : SMBDATA ==> TCHSCR_RST_L */ + PAD_CFG_GPO(GPP_C1, 1, DEEP), + /* H20 : IMGCLKOUT1 ==> WLAN_PERST_L */ PAD_CFG_GPO(GPP_H20, 0, DEEP), /* A13 : GPP_A13 ==> GSC_SOC_INT_ODL */ diff --git a/src/mainboard/google/brya/variants/anraggar/overridetree.cb b/src/mainboard/google/brya/variants/anraggar/overridetree.cb index 30c3c1b3b0..5308317922 100644 --- a/src/mainboard/google/brya/variants/anraggar/overridetree.cb +++ b/src/mainboard/google/brya/variants/anraggar/overridetree.cb @@ -221,10 +221,10 @@ chip soc/intel/alderlake register "generic.detect" = "1" register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)" register "generic.reset_delay_ms" = "200" - register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)" + register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C6)" register "generic.enable_delay_ms" = "12" - register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C6)" - register "generic.stop_off_delay_ms" = "2" + register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)" + register "generic.stop_off_delay_ms" = "200" register "generic.has_power_resource" = "1" register "hid_desc_reg_offset" = "0x01" device i2c 41 on end |