diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2024-02-29 16:45:12 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2024-03-01 16:24:22 +0000 |
| commit | 0ada3dafd0d20c2a5b361237d7e9aabf8ed96457 (patch) | |
| tree | 43e328629d6b9cb2ba9e9bab1c1c23c10ad61fb2 | |
| parent | 5ad8a5fa47275cb7de5b096aa0273c83481c4aa6 (diff) | |
acpi/acpigen_pci_root_resource_producer: zero-pad ranges
Print bus number, IO and MMIO ranges as fixed length zero-padded
hexadecimal numbers. The bus numbers are 1 byte long, the IO range
values are 2 bytes long and the MMIO range values can be up to 8 bytes
long, so use '%02x', '%04llx' and '%016llx' in the corresponding parts
of the format string.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Suggested-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Change-Id: Iea45094a3988d57f8640a98fd7214d33ed1d7ccb
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80804
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
| -rw-r--r-- | src/acpi/acpigen_pci_root_resource_producer.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/acpi/acpigen_pci_root_resource_producer.c b/src/acpi/acpigen_pci_root_resource_producer.c index c9efe0e34a..78e1a89a3b 100644 --- a/src/acpi/acpigen_pci_root_resource_producer.c +++ b/src/acpi/acpigen_pci_root_resource_producer.c @@ -11,7 +11,7 @@ static void write_ssdt_domain_io_producer_range_helper(const char *domain_name, resource_t base, resource_t limit) { - printk(BIOS_DEBUG, "%s _CRS: adding IO range [%llx-%llx]\n", domain_name, base, limit); + printk(BIOS_DEBUG, "%s _CRS: adding IO range [%04llx-%04llx]\n", domain_name, base, limit); acpigen_resource_producer_io(base, limit); } @@ -38,7 +38,7 @@ static void write_ssdt_domain_io_producer_range(const char *domain_name, static void write_ssdt_domain_mmio_producer_range(const char *domain_name, resource_t base, resource_t limit) { - printk(BIOS_DEBUG, "%s _CRS: adding MMIO range [%llx-%llx]\n", + printk(BIOS_DEBUG, "%s _CRS: adding MMIO range [%016llx-%016llx]\n", domain_name, base, limit); acpigen_resource_producer_mmio(base, limit, MEM_RSRC_FLAG_MEM_READ_WRITE | MEM_RSRC_FLAG_MEM_ATTR_NON_CACHE); @@ -54,7 +54,7 @@ void pci_domain_fill_ssdt(const struct device *domain) acpigen_write_resourcetemplate_header(); /* PCI bus number range in domain */ - printk(BIOS_DEBUG, "%s _CRS: adding busses [%x-%x] in segment group %x\n", + printk(BIOS_DEBUG, "%s _CRS: adding busses [%02x-%02x] in segment group %x\n", acpi_device_name(domain), domain->downstream->secondary, domain->downstream->max_subordinate, domain->downstream->segment_group); acpigen_resource_producer_bus_number(domain->downstream->secondary, |