diff options
| author | Jincheng Li <jincheng.li@intel.com> | 2024-03-04 21:57:06 +0800 |
|---|---|---|
| committer | Lean Sheng Tan <sheng.tan@9elements.com> | 2024-03-07 13:27:17 +0000 |
| commit | 04fde7ed374bb0811f6d27a07104a03a421a3dd1 (patch) | |
| tree | 691825420b4b5bab7c83018016f6a5879ec1d342 | |
| parent | a5bdf8e8df7c2afe0264c58537569d6142d145cd (diff) | |
soc/intel/xeon_sp: Unshare UDK binding among Xeon-SP platforms
TEST=intel/archercity CRB
Change-Id: I285549daad87fe1ad6e8a94853e0a92cd5930e04
Signed-off-by: Li, Jincheng <jincheng.li@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81041
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
| -rw-r--r-- | src/soc/intel/xeon_sp/Kconfig | 1 | ||||
| -rw-r--r-- | src/soc/intel/xeon_sp/cpx/Kconfig | 1 | ||||
| -rw-r--r-- | src/soc/intel/xeon_sp/skx/Kconfig | 1 | ||||
| -rw-r--r-- | src/soc/intel/xeon_sp/spr/Kconfig | 1 |
4 files changed, 3 insertions, 1 deletions
diff --git a/src/soc/intel/xeon_sp/Kconfig b/src/soc/intel/xeon_sp/Kconfig index 18474ec0a6..59335a1c41 100644 --- a/src/soc/intel/xeon_sp/Kconfig +++ b/src/soc/intel/xeon_sp/Kconfig @@ -47,7 +47,6 @@ config MAINBOARD_USES_FSP2_0 bool default y select PLATFORM_USES_FSP2_0 - select UDK_202005_BINDING select POSTCAR_STAGE config MAX_SOCKET diff --git a/src/soc/intel/xeon_sp/cpx/Kconfig b/src/soc/intel/xeon_sp/cpx/Kconfig index b9d63d3ad2..51e545f148 100644 --- a/src/soc/intel/xeon_sp/cpx/Kconfig +++ b/src/soc/intel/xeon_sp/cpx/Kconfig @@ -8,6 +8,7 @@ config SOC_INTEL_COOPERLAKE_SP select NO_FSP_TEMP_RAM_EXIT select HAVE_INTEL_FSP_REPO select FSP_SPEC_VIOLATION_XEON_SP_HEAP_WORKAROUND + select UDK_202005_BINDING help Intel Cooper Lake-SP support diff --git a/src/soc/intel/xeon_sp/skx/Kconfig b/src/soc/intel/xeon_sp/skx/Kconfig index 5d843878e1..4a9e6831d3 100644 --- a/src/soc/intel/xeon_sp/skx/Kconfig +++ b/src/soc/intel/xeon_sp/skx/Kconfig @@ -5,6 +5,7 @@ config SOC_INTEL_SKYLAKE_SP select XEON_SP_COMMON_BASE select PLATFORM_USES_FSP2_0 select NO_FSP_TEMP_RAM_EXIT + select UDK_202005_BINDING help Intel Skylake-SP support diff --git a/src/soc/intel/xeon_sp/spr/Kconfig b/src/soc/intel/xeon_sp/spr/Kconfig index ace5c07042..acc5e4a1b9 100644 --- a/src/soc/intel/xeon_sp/spr/Kconfig +++ b/src/soc/intel/xeon_sp/spr/Kconfig @@ -14,6 +14,7 @@ config SOC_INTEL_SAPPHIRERAPIDS_SP select XEON_SP_COMMON_BASE select HAVE_IOAT_DOMAINS select FSP_SPEC_VIOLATION_XEON_SP_HEAP_WORKAROUND + select UDK_202005_BINDING help Intel Sapphire Rapids-SP support |