diff options
author | Nico Huber <nico.h@gmx.de> | 2020-10-04 16:11:18 +0200 |
---|---|---|
committer | Nico Huber <nico.h@gmx.de> | 2020-10-29 00:01:28 +0000 |
commit | 0082a3e59e30aa4a92146dad05c58553cd4ee197 (patch) | |
tree | 19c31017b060f5d801e7b049531521aea6100513 | |
parent | 025846537331783e01d8e9ea58727fd43a8f8ba6 (diff) |
mb/asus/f2a85-m_pro: Comment and group super-I/O GPIO settings
Change-Id: I8f5a87d006f8bf20af40f7a4f09b1e4b597ba79f
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46019
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r-- | src/mainboard/asus/f2a85-m/devicetree_f2a85-m_pro.cb | 102 |
1 files changed, 53 insertions, 49 deletions
diff --git a/src/mainboard/asus/f2a85-m/devicetree_f2a85-m_pro.cb b/src/mainboard/asus/f2a85-m/devicetree_f2a85-m_pro.cb index aa213215cc..aa2d52e567 100644 --- a/src/mainboard/asus/f2a85-m/devicetree_f2a85-m_pro.cb +++ b/src/mainboard/asus/f2a85-m/devicetree_f2a85-m_pro.cb @@ -45,71 +45,75 @@ chip northbridge/amd/agesa/family15tn/root_complex end device pnp 2e.6 off end # CIR device pnp 2e.7 on # GPIO6, GPIO7, GPIO8 - irq 0xe0 = 0x7f - irq 0xe1 = 0x10 - irq 0xe2 = 0x00 - irq 0xe3 = 0x00 - irq 0xe4 = 0xff - irq 0xe5 = 0xff - irq 0xe6 = 0xff - irq 0xe7 = 0xff - irq 0xec = 0x00 - irq 0xed = 0xff - irq 0xf4 = 0xff - irq 0xf5 = 0xff - irq 0xf6 = 0x00 - irq 0xf7 = 0x00 - irq 0xf8 = 0x00 + irq 0xf4 = 0xff # GPIO6 i/o + irq 0xf5 = 0xff # GPIO6 data + irq 0xf6 = 0x00 # GPIO6 inversion + irq 0xf7 = 0x00 # GPIO6 status + irq 0xf8 = 0x00 # GPIO6 multiplex + + irq 0xe0 = 0x7f # GPIO7 i/o + irq 0xe1 = 0x10 # GPIO7 data + irq 0xe2 = 0x00 # GPIO7 inversion + irq 0xe3 = 0x00 # GPIO7 status + irq 0xec = 0x00 # GPIO7 multiplex + + irq 0xe4 = 0xff # GPIO8 i/o + irq 0xe5 = 0xff # GPIO8 data + irq 0xe6 = 0xff # GPIO8 inversion + irq 0xe7 = 0xff # GPIO8 status + irq 0xed = 0xff # GPIO8 multiplex end device pnp 2e.008 off # WDT1 end device pnp 2e.108 on # GPIO0, GPIO1 - irq 0xe0 = 0xff - irq 0xe1 = 0xff - irq 0xe2 = 0xff - irq 0xe3 = 0xff - irq 0xe4 = 0xff - irq 0xf0 = 0xff - irq 0xf1 = 0x28 - irq 0xf2 = 0x00 - irq 0xf3 = 0x00 - irq 0xf4 = 0x08 - irq 0xf5 = 0xff - irq 0xf6 = 0x00 - irq 0xf7 = 0xff + irq 0xe0 = 0xff # GPIO0 i/o + irq 0xe1 = 0xff # GPIO0 data + irq 0xe2 = 0xff # GPIO0 inversion + irq 0xe3 = 0xff # GPIO0 status + irq 0xe4 = 0xff # GPIO0 multiplex + + irq 0xf0 = 0xff # GPIO1 i/o + irq 0xf1 = 0x28 # GPIO1 data + irq 0xf2 = 0x00 # GPIO1 inversion + irq 0xf3 = 0x00 # GPIO1 status + irq 0xf4 = 0x08 # GPIO1 multiplex + + irq 0xf5 = 0xff # WDT1 control mode + irq 0xf6 = 0x00 # WDT1 counter + irq 0xf7 = 0xff # WDT1 control / status end device pnp 2e.009 off # GPIO8 end device pnp 2e.109 on # GPIO1 end device pnp 2e.209 on # GPIO2 - irq 0xe0 = 0xff - irq 0xe1 = 0x90 - irq 0xe2 = 0x00 - irq 0xe3 = 0x00 - irq 0xe9 = 0x00 + irq 0xe0 = 0xff # GPIO2 i/o + irq 0xe1 = 0x90 # GPIO2 data + irq 0xe2 = 0x00 # GPIO2 inversion + irq 0xe3 = 0x00 # GPIO2 status + irq 0xe9 = 0x00 # GPIO2 multiplex end device pnp 2e.309 on # GPIO3 - irq 0xe4 = 0x7f - irq 0xe5 = 0x76 - irq 0xe6 = 0x00 - irq 0xe7 = 0x00 - irq 0xea = 0x00 - irq 0xfe = 0x00 + irq 0xe4 = 0x7f # GPIO3 i/o + irq 0xe5 = 0x76 # GPIO3 data + irq 0xe6 = 0x00 # GPIO3 inversion + irq 0xe7 = 0x00 # GPIO3 status + irq 0xea = 0x00 # GPIO3 multiplex + irq 0xfe = 0x00 # GPIO3/4 debounce end device pnp 2e.409 on # GPIO4 - irq 0xe8 = 0x00 - irq 0xf0 = 0xff - irq 0xf1 = 0x7b - irq 0xf2 = 0x00 - irq 0xee = 0x00 + irq 0xf0 = 0xff # GPIO4 i/o + irq 0xf1 = 0x7b # GPIO4 data + irq 0xf2 = 0x00 # GPIO4 inversion + irq 0xe8 = 0x00 # GPIO4 status + irq 0xee = 0x00 # GPIO4 multiplex end device pnp 2e.509 on # GPIO5 - irq 0xeb = 0x00 - irq 0xf4 = 0xff - irq 0xf5 = 0xef - irq 0xf6 = 0x00 - irq 0xf7 = 0x00 + irq 0xf4 = 0xff # GPIO5 i/o + irq 0xf5 = 0xef # GPIO5 data + irq 0xf6 = 0x00 # GPIO5 inversion + irq 0xf7 = 0x00 # GPIO5 status + irq 0xeb = 0x00 # GPIO5 multiplex end device pnp 2e.609 on # GPIO6 end |