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authorArthur Heymans <arthur@aheymans.xyz>2017-05-24 10:57:13 +0200
committerMartin Roth <martinroth@google.com>2017-05-25 17:37:52 +0200
commit000cc598cbd2ab663e1192d8623171bda293b6d3 (patch)
treea2a28bed36aaaf61d7d54798b29a9575b13c4bc9
parent36dafd88bcff01a67ce2ee4ddd32026f0b439c70 (diff)
mb/lenovo/*60: Remove not existing DIMMs from SPD map
Should result in a tiny speed bump in raminit since those addresses are not checked for present DIMMs. Checked in schematics of both Thinkpad X60 and T60 and tested to configure raminit correctly for all DIMMs populated on X60. Change-Id: I56c4f3176541bc75a8de3aac9f87526a77fc819b Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/19862 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
-rw-r--r--src/mainboard/lenovo/t60/romstage.c2
-rw-r--r--src/mainboard/lenovo/x60/romstage.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/lenovo/t60/romstage.c b/src/mainboard/lenovo/t60/romstage.c
index cb3f8bc85e..80b989fc50 100644
--- a/src/mainboard/lenovo/t60/romstage.c
+++ b/src/mainboard/lenovo/t60/romstage.c
@@ -172,7 +172,7 @@ void mainboard_romstage_entry(unsigned long bist)
{
int s3resume = 0;
int dock_err;
- const u8 spd_addrmap[2 * DIMM_SOCKETS] = { 0x50, 0x52, 0x51, 0x53 };
+ const u8 spd_addrmap[2 * DIMM_SOCKETS] = { 0x50, 0, 0x51, 0 };
timestamp_init(get_initial_timestamp());
diff --git a/src/mainboard/lenovo/x60/romstage.c b/src/mainboard/lenovo/x60/romstage.c
index 51624a009e..eddb1506bb 100644
--- a/src/mainboard/lenovo/x60/romstage.c
+++ b/src/mainboard/lenovo/x60/romstage.c
@@ -171,7 +171,7 @@ static void early_ich7_init(void)
void mainboard_romstage_entry(unsigned long bist)
{
int s3resume = 0;
- const u8 spd_addrmap[2 * DIMM_SOCKETS] = { 0x50, 0x52, 0x51, 0x53 };
+ const u8 spd_addrmap[2 * DIMM_SOCKETS] = { 0x50, 0, 0x51, 0 };
timestamp_init(get_initial_timestamp());