Remove incorrect IOAPIC lines from some mptable.c files.

 - via/epia-n/mptable.c
 - intel/eagleheights/mptable.c (commented out anyway)
 - asus/p2b-d/mptable.c
 - asus/p2b-ds/mptable.c

Some files still incorrectly contain some smp_write_ioapic() lines from
the original mptable utility target (Supermicro P4DPE), which has one
IOAPIC in the southbridge (Intel ICH3-S), two IOAPICs contained in
the first P64H2, and two more in the second P64H2, i.e. 5 IOAPICs in total.

However, none of the boards where this chunk of code is present has
multiple IOAPICs (and even if they had, the PCI devices where those are
located would probably be different anyway), so drop the incorrect
mptable.c contents.

Also drop the lines from the mptable utility, so that future mptable.c files
don't incorrectly inherit any of this stuff.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Jonathan Kollasch <jakllsch@kollasch.net>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6006 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

4 files changed, 4 insertions, 130 deletions

diff --git a/src/mainboard/asus/p2b-d/mptable.c b/src/mainboard/asus/p2b-d/mptable.c
index 699cbea3d1..1fa9ebafce 100644
--- a/src/mainboard/asus/p2b-d/mptable.c
+++ b/src/mainboard/asus/p2b-d/mptable.c
@@ -42,35 +42,6 @@ static void *smp_write_config_table(void *v)
 	ioapic_ver = 0x11; /* External Intel 82093AA IOAPIC. */
 	smp_write_ioapic(mc, ioapic_id, ioapic_ver, IO_APIC_ADDR);
 
-	{
-		device_t dev;
-		struct resource *res;
-		dev = dev_find_slot(1, PCI_DEVFN(0x1e, 0));
-		if (dev) {
-			res = find_resource(dev, PCI_BASE_ADDRESS_0);
-			if (res)
-				smp_write_ioapic(mc, 3, ioapic_ver, res->base);
-		}
-		dev = dev_find_slot(1, PCI_DEVFN(0x1c, 0));
-		if (dev) {
-			res = find_resource(dev, PCI_BASE_ADDRESS_0);
-			if (res)
-				smp_write_ioapic(mc, 4, ioapic_ver, res->base);
-		}
-		dev = dev_find_slot(4, PCI_DEVFN(0x1e, 0));
-		if (dev) {
-			res = find_resource(dev, PCI_BASE_ADDRESS_0);
-			if (res)
-				smp_write_ioapic(mc, 5, ioapic_ver, res->base);
-		}
-		dev = dev_find_slot(4, PCI_DEVFN(0x1c, 0));
-		if (dev) {
-			res = find_resource(dev, PCI_BASE_ADDRESS_0);
-			if (res)
-				smp_write_ioapic(mc, 8, ioapic_ver, res->base);
-		}
-	}
-
 	/* Legacy Interrupts */
 	mptable_add_isa_interrupts(mc, isa_bus, ioapic_id, 0);
 
diff --git a/src/mainboard/intel/eagleheights/mptable.c b/src/mainboard/intel/eagleheights/mptable.c
index df5b968f3f..2c814d9e49 100644
--- a/src/mainboard/intel/eagleheights/mptable.c
+++ b/src/mainboard/intel/eagleheights/mptable.c
@@ -129,40 +129,7 @@ static void *smp_write_config_table(void *v)
 
 	/*I/O APICs: APIC ID Version State Address*/
 	smp_write_ioapic(mc, 2, 0x20, IO_APIC_ADDR);
-	/*
-	{
-		device_t dev;
-		struct resource *res;
-		dev = dev_find_slot(1, PCI_DEVFN(0x1e,0));
-		if (dev) {
-			res = find_resource(dev, PCI_BASE_ADDRESS_0);
-			if (res) {
-				smp_write_ioapic(mc, 3, 0x20, res->base);
-			}
-		}
-		dev = dev_find_slot(1, PCI_DEVFN(0x1c,0));
-		if (dev) {
-			res = find_resource(dev, PCI_BASE_ADDRESS_0);
-			if (res) {
-				smp_write_ioapic(mc, 4, 0x20, res->base);
-			}
-		}
-                dev = dev_find_slot(4, PCI_DEVFN(0x1e,0));
-                if (dev) {
-			res = find_resource(dev, PCI_BASE_ADDRESS_0);
-			if (res) {
-				smp_write_ioapic(mc, 5, 0x20, res->base);
-			}
-                }
-                dev = dev_find_slot(4, PCI_DEVFN(0x1c,0));
-                if (dev) {
-			res = find_resource(dev, PCI_BASE_ADDRESS_0);
-			if (res) {
-				smp_write_ioapic(mc, 8, 0x20, res->base);
-			}
-                }
-	}
-	*/
+
 	mptable_add_isa_interrupts(mc, bus_isa, IO_APIC0, 0);
 
 	/*Local Ints:	Type	Polarity    Trigger	Bus ID	 IRQ	APIC ID	PIN#*/
diff --git a/src/mainboard/via/epia-n/mptable.c b/src/mainboard/via/epia-n/mptable.c
index 9ffa2b1765..dc8ef2780c 100644
--- a/src/mainboard/via/epia-n/mptable.c
+++ b/src/mainboard/via/epia-n/mptable.c
@@ -21,38 +21,7 @@ static void *smp_write_config_table(void *v)
 
 /*I/O APICs:	APIC ID	Version	State		Address*/
 	smp_write_ioapic(mc, 2, 0x20, IO_APIC_ADDR);
-	{
-		device_t dev;
-		struct resource *res;
-		dev = dev_find_slot(1, PCI_DEVFN(0x1e,0));
-		if (dev) {
-			res = find_resource(dev, PCI_BASE_ADDRESS_0);
-			if (res) {
-				smp_write_ioapic(mc, 3, 0x20, res->base);
-			}
-		}
-		dev = dev_find_slot(1, PCI_DEVFN(0x1c,0));
-		if (dev) {
-			res = find_resource(dev, PCI_BASE_ADDRESS_0);
-			if (res) {
-				smp_write_ioapic(mc, 4, 0x20, res->base);
-			}
-		}
-                dev = dev_find_slot(4, PCI_DEVFN(0x1e,0));
-                if (dev) {
-			res = find_resource(dev, PCI_BASE_ADDRESS_0);
-			if (res) {
-				smp_write_ioapic(mc, 5, 0x20, res->base);
-			}
-                }
-                dev = dev_find_slot(4, PCI_DEVFN(0x1c,0));
-                if (dev) {
-			res = find_resource(dev, PCI_BASE_ADDRESS_0);
-			if (res) {
-				smp_write_ioapic(mc, 8, 0x20, res->base);
-			}
-                }
-	}
+
 	mptable_add_isa_interrupts(mc, isa_bus, 0x2, 0);
 
 /*I/O Ints:	Type	Polarity    Trigger	Bus ID	 IRQ	APIC ID	PIN# */
diff --git a/util/mptable/mptable.c b/util/mptable/mptable.c
index b713ad54cf..ce775dd712 100644
--- a/util/mptable/mptable.c
+++ b/util/mptable/mptable.c
@@ -320,9 +320,7 @@ char *preamble[] = {
 };
 
 char *postamble[] = {
-"	/* There is no extension information... */",
-"",
-"	/* Compute the checksums */",
+"	/* Compute the checksums. */",
 "	mc->mpe_checksum = smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length);",
 "	mc->mpc_checksum = smp_compute_checksum(mc, mc->mpc_length);",
 "	printk(BIOS_DEBUG, \"Wrote the mp table end at: %p - %p\\n\",",
@@ -341,38 +339,7 @@ char *postamble[] = {
 
 char *ioapic_code[] = {
 "	smp_write_ioapic(mc, 2, 0x20, IO_APIC_ADDR);",
-"	{",
-"		device_t dev;",
-"		struct resource *res;",
-"		dev = dev_find_slot(1, PCI_DEVFN(0x1e,0));",
-"		if (dev) {",
-"			res = find_resource(dev, PCI_BASE_ADDRESS_0);",
-"			if (res) {",
-"				smp_write_ioapic(mc, 3, 0x20, res->base);",
-"			}",
-"		}",
-"		dev = dev_find_slot(1, PCI_DEVFN(0x1c,0));",
-"		if (dev) {",
-"			res = find_resource(dev, PCI_BASE_ADDRESS_0);",
-"			if (res) {",
-"				smp_write_ioapic(mc, 4, 0x20, res->base);",
-"			}",
-"		}",
-"                dev = dev_find_slot(4, PCI_DEVFN(0x1e,0));",
-"                if (dev) {",
-"			res = find_resource(dev, PCI_BASE_ADDRESS_0);",
-"			if (res) {",
-"				smp_write_ioapic(mc, 5, 0x20, res->base);",
-"			}",
-"                }",
-"                dev = dev_find_slot(4, PCI_DEVFN(0x1c,0));",
-"                if (dev) {",
-"			res = find_resource(dev, PCI_BASE_ADDRESS_0);",
-"			if (res) {",
-"				smp_write_ioapic(mc, 8, 0x20, res->base);",
-"			}",
-"                }",
-"	}",
+"	/* TODO: If you have multiple IOAPICs, add them here. */",
 0
 };
 static void