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authorSubrata Banik <subrata.banik@intel.com>2020-09-24 13:54:35 +0530
committerSubrata Banik <subrata.banik@intel.com>2020-09-27 03:02:10 +0000
commited6604d1f571f020471886172b896132406d0415 (patch)
tree84cc9051dc00b57d84b4bccabbe0d80232f9165a
parenteab9e867330ad55374de283445b65c67ddab941b (diff)
soc/intel/skylake: Use GPIO state macros from intelblocks/gpio_defs.h
TEST=Able to build and boot EVE platform. 1) Dump and disassemble DSDT, verify unified methods like GRXS, GTXS etc. are there 2) Verify no ACPI error seen while running 'dmesg' from console 3) abuild --timeless to ensure there are no other functional changes. Change-Id: I02df3ddf5ad33d42d97feefb0fa366ad8c856565 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45681 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/soc/intel/skylake/acpi/gpio.asl12
1 files changed, 5 insertions, 7 deletions
diff --git a/src/soc/intel/skylake/acpi/gpio.asl b/src/soc/intel/skylake/acpi/gpio.asl
index de6ff42226..9877a77571 100644
--- a/src/soc/intel/skylake/acpi/gpio.asl
+++ b/src/soc/intel/skylake/acpi/gpio.asl
@@ -1,9 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
+#include <intelblocks/gpio_defs.h>
#include <soc/gpio.h>
-#define GPIOTXSTATE_MASK 0x1
-#define GPIORXSTATE_MASK 0x1
-
Device (GPIO)
{
Name (_HID, "INT344B")
@@ -119,7 +117,7 @@ Method (GRXS, 1, Serialized)
{
VAL0, 32
}
- Local0 = GPIORXSTATE_MASK & (VAL0 >> PAD_CFG0_RX_STATE_BIT)
+ Local0 = (PAD_CFG0_RX_STATE & VAL0) >> PAD_CFG0_RX_STATE_BIT
Return (Local0)
}
@@ -135,7 +133,7 @@ Method (GTXS, 1, Serialized)
{
VAL0, 32
}
- Local0 = GPIOTXSTATE_MASK & VAL0
+ Local0 = PAD_CFG0_TX_STATE & VAL0
Return (Local0)
}
@@ -151,7 +149,7 @@ Method (STXS, 1, Serialized)
{
VAL0, 32
}
- VAL0 |= GPIOTXSTATE_MASK
+ VAL0 |= PAD_CFG0_TX_STATE
}
/*
@@ -165,5 +163,5 @@ Method (CTXS, 1, Serialized)
{
VAL0, 32
}
- VAL0 &= ~GPIOTXSTATE_MASK
+ VAL0 &= ~PAD_CFG0_TX_STATE
}