google/snow: Minor clean-ups for display setup code in ramstage

This just cleans up a few areas:
- Removed an unnecessary delay from exynos_dp_bridge_setup()
- The delay at the end of exynos_dp_bridge_init() is necessary, so
  removed the comment suggesting that it might not be.
- Simplified exynos_dp_hotplug

Change-Id: I44150f5ef3958e333985440c1022b4f1544a93aa
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: http://review.coreboot.org/3113
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>

1 files changed, 2 insertions, 10 deletions

diff --git a/src/mainboard/google/snow/ramstage.c b/src/mainboard/google/snow/ramstage.c
index 795b5454fd..1cd84e841d 100644
--- a/src/mainboard/google/snow/ramstage.c
+++ b/src/mainboard/google/snow/ramstage.c
@@ -99,8 +99,6 @@ static void exynos_dp_bridge_setup(void)
 	gpio_set_pull(dp_rst_l, EXYNOS_GPIO_PULL_NONE);
 	udelay(10);
 	gpio_set_value(dp_rst_l, 1);
-
-	udelay(90000);	/* FIXME: this might be unnecessary */
 }
 
 static void exynos_dp_bridge_init(void)
@@ -117,19 +115,13 @@ static void exynos_dp_bridge_init(void)
 	 * roughly 50ms after PD is de-asserted. The phantom high
 	 * makes it hard for us to know when the NXP chip is up.
 	 */
-	udelay(90000);	/* FIXME: this might be unnecessary */
+	udelay(90000);
 }
 
 static int exynos_dp_hotplug(void)
 {
-	int x = gpio_get_value(dp_hpd);
 	/* Check HPD.  If it's high, we're all good. */
-//	if (gpio_get_value(dp_hpd))
-//		return 0;
-	printk(BIOS_DEBUG, "%s: dp_hpd: 0x%02x\n", __func__, x);
-	if (x)
-		return 0;
-	return -1;
+	return gpio_get_value(dp_hpd) ? 0 : 1;
 }
 
 static void exynos_dp_reset(void)