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authorJett Rink <jettrink@chromium.org>2019-04-25 14:21:52 -0600
committerPatrick Georgi <pgeorgi@google.com>2019-04-29 12:21:53 +0000
commitc426be6ae29ad345d5f6a42726859fd8457f9814 (patch)
tree581590738f840bd56e388173a6be4dba70204d89
parent5806665059f1483665c1b2a8ad386e1e90265dcd (diff)
arcada: add internal pull to ISH UART RX
We do not want the RX signal to be floating on the board as that could cause the ISH to remain in a higher power state (because there is logic to keep the ISH in an higher power state when there is an active UART). Add an internal 20K pull up on the RX line. In normal configuration this will burn an additional 544uW. BRANCH=R75 BUG=b:131241969 TEST=verify that ISH console still works with rework Change-Id: Ifc9621bcafe4c86edfa9cd6d58b307254d3a81ca Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32471 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
-rw-r--r--src/mainboard/google/sarien/variants/arcada/gpio.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/sarien/variants/arcada/gpio.c b/src/mainboard/google/sarien/variants/arcada/gpio.c
index a88e0b1190..da95497657 100644
--- a/src/mainboard/google/sarien/variants/arcada/gpio.c
+++ b/src/mainboard/google/sarien/variants/arcada/gpio.c
@@ -123,7 +123,7 @@ static const struct pad_config gpio_table[] = {
/* ISH_SPI_MISO */ PAD_CFG_GPI(GPP_D11, NONE, DEEP), /* TBT_DET# */
/* ISH_SPI_MOSI */ PAD_NC(GPP_D12, NONE),
/* ISH_CPU_UART0_RX */
-/* ISH_UART0_RXD */ PAD_CFG_NF(GPP_D13, NONE, DEEP, NF1),
+/* ISH_UART0_RXD */ PAD_CFG_NF(GPP_D13, UP_20K, DEEP, NF1),
/* ISH_CPU_UART0_TX */
/* ISH_UART0_TXD */ PAD_CFG_NF(GPP_D14, NONE, DEEP, NF1),
/* ISH_UART0_RTS# */ PAD_CFG_GPO(GPP_D15, 1, DEEP), /* WWAN_FULL_PWR_EN */