diff options
| author | Daisuke Nojiri <dnojiri@chromium.org> | 2018-01-26 17:36:44 -0800 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2018-02-17 04:00:39 +0000 |
| commit | c205ae0c6e414a8fe34f25f2f9e23b97182b17e6 (patch) | |
| tree | f80a73b172f6d25df5626c27a929623f3d1171f4 | |
| parent | ebb86be9fcaf64daa71e8ee3bff52c6982708a23 (diff) | |
mb/google/fizz: Wait until display is ready
Fizz fails to show pictures on a type-c monitor because VBIOS runs
before DisplayPort link is ready.
With this patch, when firmware needs to display something, Fizz calls
google_chromeec_wait_for_display to make sure display is ready.
The penalty is up to 2 sec per boot in dev and rec boot. Normal boot
won't affected unless there is EC update.
BUG=b:72387533
BRANCH=none
TEST=Verify screens are displayed on Fizz as follows:
1. Put DUT in normal mode
2. Flash EC image to trigger EC sync (critical update)
3. Trigger manual recovery (insert)
4. Hit ctrl+d to switch to dev mode (to-dev)
5. Confirm to reboot (dev warning)
6. Warm reboot (dev warning)
7. Cold reboot (dev warning)
8. Flash EC image to trigger EC sync (critical update)
9. Trigger manual recovery (insert)
Change-Id: I90befe94f93e13904987acda50b2598d034b0031
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://review.coreboot.org/23746
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
| -rw-r--r-- | src/mainboard/google/fizz/ramstage.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/mainboard/google/fizz/ramstage.c b/src/mainboard/google/fizz/ramstage.c index 6dafe65c97..e5215f87d8 100644 --- a/src/mainboard/google/fizz/ramstage.c +++ b/src/mainboard/google/fizz/ramstage.c @@ -13,11 +13,16 @@ * GNU General Public License for more details. */ +#include <bootmode.h> +#include <ec/google/chromeec/ec.h> #include <soc/ramstage.h> #include "gpio.h" void mainboard_silicon_init_params(FSP_SIL_UPD *params) { + if (display_init_required()) + /* This has to be done before FSP-S runs. */ + google_chromeec_wait_for_display(); gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table)); } |