sb/intel/lynxpoint: Factor out RCBA Function Disable

Comments stating that this was mainboard-specific were very wrong.

Change-Id: I7026ca9c7dabd01b4a0c0549b697e006d5f75eb8
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43096
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tristan Corrick <tristan@corrick.kiwi>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>

8 files changed, 2 insertions, 17 deletions

diff --git a/src/mainboard/asrock/b85m_pro4/romstage.c b/src/mainboard/asrock/b85m_pro4/romstage.c
index 6f0bcd25c8..5206e968c0 100644
--- a/src/mainboard/asrock/b85m_pro4/romstage.c
+++ b/src/mainboard/asrock/b85m_pro4/romstage.c
@@ -19,8 +19,6 @@ static const struct rcba_config_instruction rcba_config[] = {
 	RCBA_SET_REG_16(D22IR, DIR_ROUTE(PIRQA, PIRQD, PIRQC, PIRQB)),
 	RCBA_SET_REG_16(D20IR, DIR_ROUTE(PIRQA, PIRQB, PIRQC, PIRQD)),
 
-	RCBA_RMW_REG_32(FD, ~0, PCH_DISABLE_ALWAYS),
-
 	RCBA_END_CONFIG,
 };
 
diff --git a/src/mainboard/asrock/h81m-hds/romstage.c b/src/mainboard/asrock/h81m-hds/romstage.c
index 83c4d9c8fd..3ea03cb275 100644
--- a/src/mainboard/asrock/h81m-hds/romstage.c
+++ b/src/mainboard/asrock/h81m-hds/romstage.c
@@ -19,8 +19,6 @@ static const struct rcba_config_instruction rcba_config[] = {
 	RCBA_SET_REG_16(D22IR, DIR_ROUTE(PIRQA, PIRQD, PIRQC, PIRQB)),
 	RCBA_SET_REG_16(D20IR, DIR_ROUTE(PIRQA, PIRQB, PIRQC, PIRQD)),
 
-	RCBA_RMW_REG_32(FD, ~0, PCH_DISABLE_ALWAYS),
-
 	RCBA_END_CONFIG,
 };
 
diff --git a/src/mainboard/google/beltino/romstage.c b/src/mainboard/google/beltino/romstage.c
index ebab11b440..3a19d576af 100644
--- a/src/mainboard/google/beltino/romstage.c
+++ b/src/mainboard/google/beltino/romstage.c
@@ -46,9 +46,6 @@ const struct rcba_config_instruction rcba_config[] = {
 	RCBA_SET_REG_32(D20IR, DIR_ROUTE(PIRQC, PIRQC, PIRQC, PIRQC)),/* XHCI */
 	RCBA_SET_REG_32(D23IR, DIR_ROUTE(PIRQH, PIRQH, PIRQH, PIRQH)),/* SDIO */
 
-	/* Disable unused devices (board specific) */
-	RCBA_RMW_REG_32(FD, ~0, PCH_DISABLE_ALWAYS),
-
 	RCBA_END_CONFIG,
 };
 
diff --git a/src/mainboard/google/slippy/romstage.c b/src/mainboard/google/slippy/romstage.c
index 9fac04b4cd..fdb887b554 100644
--- a/src/mainboard/google/slippy/romstage.c
+++ b/src/mainboard/google/slippy/romstage.c
@@ -41,9 +41,6 @@ const struct rcba_config_instruction rcba_config[] = {
 	RCBA_SET_REG_32(D20IR, DIR_ROUTE(PIRQC, PIRQC, PIRQC, PIRQC)),/* XHCI */
 	RCBA_SET_REG_32(D23IR, DIR_ROUTE(PIRQH, PIRQH, PIRQH, PIRQH)),/* SDIO */
 
-	/* Disable unused devices (board specific) */
-	RCBA_RMW_REG_32(FD, ~0, PCH_DISABLE_ALWAYS),
-
 	RCBA_END_CONFIG,
 };
 
diff --git a/src/mainboard/intel/baskingridge/romstage.c b/src/mainboard/intel/baskingridge/romstage.c
index a6281055c7..a71d0bd078 100644
--- a/src/mainboard/intel/baskingridge/romstage.c
+++ b/src/mainboard/intel/baskingridge/romstage.c
@@ -43,9 +43,6 @@ const struct rcba_config_instruction rcba_config[] = {
 	RCBA_SET_REG_32(D25IR, DIR_ROUTE(PIRQA, PIRQB, PIRQC, PIRQD)),
 	RCBA_SET_REG_32(D22IR, DIR_ROUTE(PIRQA, PIRQB, PIRQC, PIRQD)),
 
-	/* Disable unused devices (board specific) */
-	RCBA_RMW_REG_32(FD, ~0, PCH_DISABLE_ALWAYS),
-
 	RCBA_END_CONFIG,
 };
 
diff --git a/src/mainboard/lenovo/t440p/romstage.c b/src/mainboard/lenovo/t440p/romstage.c
index ea1193fd5e..845bde8d20 100644
--- a/src/mainboard/lenovo/t440p/romstage.c
+++ b/src/mainboard/lenovo/t440p/romstage.c
@@ -21,8 +21,6 @@ static const struct rcba_config_instruction rcba_config[] = {
 	RCBA_SET_REG_16(D22IR, DIR_ROUTE(PIRQA, PIRQB, PIRQC, PIRQD)),
 	RCBA_SET_REG_16(D20IR, DIR_ROUTE(PIRQA, PIRQB, PIRQC, PIRQD)),
 
-	RCBA_RMW_REG_32(FD, ~0, PCH_DISABLE_ALWAYS),
-
 	RCBA_END_CONFIG,
 };
 
diff --git a/src/mainboard/supermicro/x10slm-f/romstage.c b/src/mainboard/supermicro/x10slm-f/romstage.c
index 2e7ffda61a..5f30eb87d4 100644
--- a/src/mainboard/supermicro/x10slm-f/romstage.c
+++ b/src/mainboard/supermicro/x10slm-f/romstage.c
@@ -18,8 +18,6 @@ static const struct rcba_config_instruction rcba_config[] = {
 	RCBA_SET_REG_16(D22IR, DIR_ROUTE(PIRQA, PIRQB, PIRQC, PIRQD)),
 	RCBA_SET_REG_16(D20IR, DIR_ROUTE(PIRQA, PIRQB, PIRQC, PIRQD)),
 
-	RCBA_RMW_REG_32(FD, ~0UL, PCH_DISABLE_ALWAYS),
-
 	RCBA_END_CONFIG,
 };
 
diff --git a/src/southbridge/intel/lynxpoint/early_pch.c b/src/southbridge/intel/lynxpoint/early_pch.c
index 0d9d8e9745..c6999a4fe7 100644
--- a/src/southbridge/intel/lynxpoint/early_pch.c
+++ b/src/southbridge/intel/lynxpoint/early_pch.c
@@ -103,6 +103,8 @@ int early_pch_init(const void *gpio_map,
 	/* Mainboard RCBA settings */
 	pch_config_rcba(rcba_config);
 
+	RCBA32_OR(FD, PCH_DISABLE_ALWAYS);
+
 	wake_from_s3 = southbridge_detect_s3_resume();
 
 	elog_boot_notify(wake_from_s3);