diff options
| author | Alex Levin <levinale@chromium.org> | 2020-01-15 21:30:20 -0800 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2020-01-24 18:36:10 +0000 |
| commit | 9bcdeb274a24a2040def463432786e6f8be43684 (patch) | |
| tree | e2de797d0d7642785fee4ce7d28f8b10a009126d | |
| parent | d250063c09d432cff563331a3dfb158d7c6a7a46 (diff) | |
arch/x86/acpi_device: Add macros to define gpio interrupt with wake
Add Provides ACPI_GPIO_IRQ_LEVEL_[LOW|HIGH]_WAKE versions to allow board to define a gpio irq as wake capable.
Change-Id: I42f5084c5f0f5da0a4b39df77707b2f158bcc03d
Signed-off-by: Alex Levin <levinale@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38445
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
| -rw-r--r-- | src/arch/x86/include/arch/acpi_device.h | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/src/arch/x86/include/arch/acpi_device.h b/src/arch/x86/include/arch/acpi_device.h index 0a702c9329..90af81ba21 100644 --- a/src/arch/x86/include/arch/acpi_device.h +++ b/src/arch/x86/include/arch/acpi_device.h @@ -303,6 +303,26 @@ struct acpi_gpio { .pin_count = 1, \ .pins = { (gpio) } } +/* Level Triggered Active High GPIO interrupt with wake */ +#define ACPI_GPIO_IRQ_LEVEL_HIGH_WAKE(gpio) { \ + .type = ACPI_GPIO_TYPE_INTERRUPT, \ + .pull = ACPI_GPIO_PULL_DEFAULT, \ + .irq.mode = ACPI_IRQ_LEVEL_TRIGGERED, \ + .irq.polarity = ACPI_IRQ_ACTIVE_HIGH, \ + .irq.wake = ACPI_IRQ_WAKE, \ + .pin_count = 1, \ + .pins = { (gpio) } } + +/* Level Triggered Active Low GPIO interrupt with wake */ +#define ACPI_GPIO_IRQ_LEVEL_LOW_WAKE(gpio) { \ + .type = ACPI_GPIO_TYPE_INTERRUPT, \ + .pull = ACPI_GPIO_PULL_DEFAULT, \ + .irq.mode = ACPI_IRQ_LEVEL_TRIGGERED, \ + .irq.polarity = ACPI_IRQ_ACTIVE_LOW, \ + .irq.wake = ACPI_IRQ_WAKE, \ + .pin_count = 1, \ + .pins = { (gpio) } } + /* Write GpioIo() or GpioInt() descriptor to SSDT AML output */ void acpi_device_write_gpio(const struct acpi_gpio *gpio); |