diff options
| author | Naresh G Solanki <Naresh.Solanki@intel.com> | 2015-12-02 20:02:07 +0530 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2016-01-19 16:34:43 +0100 |
| commit | 8c78d0a3c92e8fa1ad8517d1360ac9065e049234 (patch) | |
| tree | b6a4630e510d624e01867927289edab94edf8d6e | |
| parent | a0ee532af76d5ecca3d87b080513d84695dc5321 (diff) | |
intel/kunimitsu: Set I2C[4] port voltage to 1.8v
As the audio card needs 1.8V I2C operation. This patch adds
entry into devicetree.cb to set I2C port 4 operate at 1.8V.
Branch=None
Bug=chrome-os-partner:47821
Test=Built & booted kunimitsu board. Verified that I2C
port 4 is operating at 1.8V level
CQ-DEPEND=CL:*242225, CL:*241206, CL:315167
Change-Id: Ida69b885737aef0cfcf6a6ca21b3650169e614d9
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 990df9c1c65e75aae0a1329ead3790e78021b804
Original-Change-Id: Ifbb65e3d83561b52cc18e48b89d146c2f88f289b
Original-Signed-off-by: Naresh G Solanki <Naresh.Solanki@intel.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/315168
Original-Commit-Ready: Naresh Solanki <naresh.solanki@intel.com>
Original-Tested-by: Robbie Zhang <robbie.zhang@intel.com>
Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://review.coreboot.org/13010
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
| -rw-r--r-- | src/mainboard/intel/kunimitsu/devicetree.cb | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/intel/kunimitsu/devicetree.cb b/src/mainboard/intel/kunimitsu/devicetree.cb index 75bb7c40f8..572dd43a83 100644 --- a/src/mainboard/intel/kunimitsu/devicetree.cb +++ b/src/mainboard/intel/kunimitsu/devicetree.cb @@ -149,6 +149,7 @@ chip soc/intel/skylake register "usb3_ports[1]" = "USB3_PORT_DEFAULT" # Type-C Port 2 register "usb3_ports[2]" = "USB3_PORT_DEFAULT" # Type-A Port (card) register "usb3_ports[3]" = "USB3_PORT_DEFAULT" # Type-A Port (board) + register "SerialIoI2cVoltage[4]" = "1" # I2C4 is 1.8V # Must leave UART0 enabled or SD/eMMC will not work as PCI register "SerialIoDevMode" = "{ \ |