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authorMichael Niewöhner <foss@mniewoehner.de>2020-11-12 23:47:30 +0100
committerMichael Niewöhner <foss@mniewoehner.de>2020-11-13 18:42:49 +0000
commit89e83b76b4d50d0977345becf504a1afa0668211 (patch)
tree9f0f241dc399ac29d02c4bf6c263ca53ce6f3fb7
parent11f212b825c1f1fbeaf8e4deb052872182d3fbce (diff)
soc/intel/common/block/acpi: add Kconfig for CPPC entries generation
Change-Id: Ieae9f221ffb27cf52cab21a130e18aa3929caea3 Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47540 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/soc/intel/common/block/acpi/Kconfig9
1 files changed, 9 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/acpi/Kconfig b/src/soc/intel/common/block/acpi/Kconfig
index ff59172f3b..d9a7a87859 100644
--- a/src/soc/intel/common/block/acpi/Kconfig
+++ b/src/soc/intel/common/block/acpi/Kconfig
@@ -4,3 +4,12 @@ config SOC_INTEL_COMMON_BLOCK_ACPI
bool
help
Intel Processor common code for ACPI
+
+if SOC_INTEL_COMMON_BLOCK_ACPI
+
+config SOC_INTEL_COMMON_BLOCK_ACPI_CPPC
+ bool
+ help
+ Generate CPPC entries for Intel SpeedShift
+
+endif