chromeec: Change the API for hostevent/wake masks to handle 64-bit

ChromeEC is getting ready to bump up the hostevents and wake masks to
64-bits. The current commands to program hostevents/wake masks will
still operate on 32-bits only. A new EC host command will be added to
handle 64-bit hostevents/wake masks. In order to prevent individual
callers in coreboot from worrying about 32-bit/64-bit, the same API
provided by google/chromeec will be updated to accept 64-bit
parameters and return 64-bit values. Internally, host command handlers
will take care of masking these parameters/return values to
appropriate 32-bit/64-bit values.

BUG=b:69329196

Change-Id: If59f3f2b1a2aa5ce95883df3e72efc4a32de1190
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/22551
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

10 files changed, 55 insertions, 55 deletions

diff --git a/src/ec/google/chromeec/ec.c b/src/ec/google/chromeec/ec.c
index 3d053b608a..b44fffe9bc 100644
--- a/src/ec/google/chromeec/ec.c
+++ b/src/ec/google/chromeec/ec.c
@@ -34,7 +34,7 @@
 
 void log_recovery_mode_switch(void)
 {
-	uint32_t *events;
+	uint64_t *events;
 
 	if (cbmem_find(CBMEM_ID_EC_HOSTEVENT))
 		return;
@@ -48,7 +48,7 @@ void log_recovery_mode_switch(void)
 
 static void google_chromeec_elog_add_recovery_event(void *unused)
 {
-	uint32_t *events = cbmem_find(CBMEM_ID_EC_HOSTEVENT);
+	uint64_t *events = cbmem_find(CBMEM_ID_EC_HOSTEVENT);
 	uint8_t event_byte = EC_EVENT_KEYBOARD_RECOVERY;
 
 	if (!events)
@@ -111,7 +111,7 @@ void google_chromeec_post(u8 postcode)
  * Query the EC for specified mask indicating enabled events.
  * The EC maintains separate event masks for SMI, SCI and WAKE.
  */
-static u32 google_chromeec_get_mask(u8 type)
+static uint64_t google_chromeec_get_mask(u8 type)
 {
 	struct ec_params_host_event_mask req;
 	struct ec_response_host_event_mask rsp;
@@ -130,13 +130,13 @@ static u32 google_chromeec_get_mask(u8 type)
 	return 0;
 }
 
-static int google_chromeec_set_mask(u8 type, u32 mask)
+static int google_chromeec_set_mask(uint8_t type, uint64_t mask)
 {
 	struct ec_params_host_event_mask req;
 	struct ec_response_host_event_mask rsp;
 	struct chromeec_command cmd;
 
-	req.mask = mask;
+	req.mask = (uint32_t)mask;
 	cmd.cmd_code = type;
 	cmd.cmd_version = 0;
 	cmd.cmd_data_in = &req;
@@ -148,14 +148,14 @@ static int google_chromeec_set_mask(u8 type, u32 mask)
 	return google_chromeec_command(&cmd);
 }
 
-u32 google_chromeec_get_events_b(void)
+uint64_t google_chromeec_get_events_b(void)
 {
 	return google_chromeec_get_mask(EC_CMD_HOST_EVENT_GET_B);
 }
 
-int google_chromeec_clear_events_b(u32 mask)
+int google_chromeec_clear_events_b(uint64_t mask)
 {
-	printk(BIOS_DEBUG, "Chrome EC: clear events_b mask to 0x%08x\n", mask);
+	printk(BIOS_DEBUG, "Chrome EC: clear events_b mask to 0x%016llx\n", mask);
 	return google_chromeec_set_mask(
 		EC_CMD_HOST_EVENT_CLEAR_B, mask);
 }
@@ -176,7 +176,7 @@ int google_chromeec_get_mkbp_event(struct ec_response_get_next_event *event)
 }
 
 /* Get the current device event mask */
-uint32_t google_chromeec_get_device_enabled_events(void)
+uint64_t google_chromeec_get_device_enabled_events(void)
 {
 	struct ec_params_device_event req;
 	struct ec_response_device_event rsp;
@@ -197,13 +197,13 @@ uint32_t google_chromeec_get_device_enabled_events(void)
 }
 
 /* Set the current device event mask */
-int google_chromeec_set_device_enabled_events(uint32_t mask)
+int google_chromeec_set_device_enabled_events(uint64_t mask)
 {
 	struct ec_params_device_event req;
 	struct ec_response_device_event rsp;
 	struct chromeec_command cmd;
 
-	req.event_mask = mask;
+	req.event_mask = (uint32_t)mask;
 	req.param = EC_DEVICE_EVENT_PARAM_SET_ENABLED_EVENTS;
 	cmd.cmd_code = EC_CMD_DEVICE_EVENT;
 	cmd.cmd_version = 0;
@@ -217,7 +217,7 @@ int google_chromeec_set_device_enabled_events(uint32_t mask)
 }
 
 /* Read and clear pending device events */
-uint32_t google_chromeec_get_device_current_events(void)
+uint64_t google_chromeec_get_device_current_events(void)
 {
 	struct ec_params_device_event req;
 	struct ec_response_device_event rsp;
@@ -237,9 +237,9 @@ uint32_t google_chromeec_get_device_current_events(void)
 	return 0;
 }
 
-static void google_chromeec_log_device_events(uint32_t mask)
+static void google_chromeec_log_device_events(uint64_t mask)
 {
-	uint32_t events;
+	uint64_t events;
 	int i;
 
 	if (!IS_ENABLED(CONFIG_ELOG) || !mask)
@@ -249,7 +249,7 @@ static void google_chromeec_log_device_events(uint32_t mask)
 		return;
 
 	events = google_chromeec_get_device_current_events() & mask;
-	printk(BIOS_INFO, "EC Device Events: 0x%08x\n", events);
+	printk(BIOS_INFO, "EC Device Events: 0x%016llx\n", events);
 
 	for (i = 0; i < sizeof(events) * 8; i++) {
 		if (EC_DEVICE_EVENT_MASK(i) & events)
@@ -257,10 +257,10 @@ static void google_chromeec_log_device_events(uint32_t mask)
 	}
 }
 
-void google_chromeec_log_events(u32 mask)
+void google_chromeec_log_events(uint64_t mask)
 {
 	u8 event;
-	u32 wake_mask;
+	uint64_t wake_mask;
 	bool restore_wake_mask = false;
 
 	if (!IS_ENABLED(CONFIG_ELOG))
@@ -563,28 +563,28 @@ int google_chromeec_i2c_xfer(uint8_t chip, uint8_t addr, int alen,
 	return 0;
 }
 
-int google_chromeec_set_sci_mask(u32 mask)
+int google_chromeec_set_sci_mask(uint64_t mask)
 {
-	printk(BIOS_DEBUG, "Chrome EC: Set SCI mask to 0x%08x\n", mask);
+	printk(BIOS_DEBUG, "Chrome EC: Set SCI mask to 0x%016llx\n", mask);
 	return google_chromeec_set_mask(
 		EC_CMD_HOST_EVENT_SET_SCI_MASK, mask);
 }
 
-int google_chromeec_set_smi_mask(u32 mask)
+int google_chromeec_set_smi_mask(uint64_t mask)
 {
-	printk(BIOS_DEBUG, "Chrome EC: Set SMI mask to 0x%08x\n", mask);
+	printk(BIOS_DEBUG, "Chrome EC: Set SMI mask to 0x%016llx\n", mask);
 	return google_chromeec_set_mask(
 		EC_CMD_HOST_EVENT_SET_SMI_MASK, mask);
 }
 
-int google_chromeec_set_wake_mask(u32 mask)
+int google_chromeec_set_wake_mask(uint64_t mask)
 {
-	printk(BIOS_DEBUG, "Chrome EC: Set WAKE mask to 0x%08x\n", mask);
+	printk(BIOS_DEBUG, "Chrome EC: Set WAKE mask to 0x%016llx\n", mask);
 	return google_chromeec_set_mask(
 		EC_CMD_HOST_EVENT_SET_WAKE_MASK, mask);
 }
 
-u32 google_chromeec_get_wake_mask(void)
+uint64_t google_chromeec_get_wake_mask(void)
 {
 	return google_chromeec_get_mask(
 		EC_CMD_HOST_EVENT_GET_WAKE_MASK);
diff --git a/src/ec/google/chromeec/ec.h b/src/ec/google/chromeec/ec.h
index 25a90d756d..0b6f880909 100644
--- a/src/ec/google/chromeec/ec.h
+++ b/src/ec/google/chromeec/ec.h
@@ -26,26 +26,26 @@ void google_chromeec_ioport_range(uint16_t *base, size_t *size);
 
 int google_chromeec_i2c_xfer(uint8_t chip, uint8_t addr, int alen,
 			     uint8_t *buffer, int len, int is_read);
-u32 google_chromeec_get_wake_mask(void);
-int google_chromeec_set_sci_mask(u32 mask);
-int google_chromeec_set_smi_mask(u32 mask);
-int google_chromeec_set_wake_mask(u32 mask);
+uint64_t google_chromeec_get_wake_mask(void);
+int google_chromeec_set_sci_mask(uint64_t mask);
+int google_chromeec_set_smi_mask(uint64_t mask);
+int google_chromeec_set_wake_mask(uint64_t mask);
 u8 google_chromeec_get_event(void);
 int google_ec_running_ro(void);
 void google_chromeec_init(void);
 
 /* Device events */
-uint32_t google_chromeec_get_device_enabled_events(void);
-int google_chromeec_set_device_enabled_events(uint32_t mask);
-uint32_t google_chromeec_get_device_current_events(void);
+uint64_t google_chromeec_get_device_enabled_events(void);
+int google_chromeec_set_device_enabled_events(uint64_t mask);
+uint64_t google_chromeec_get_device_current_events(void);
 
 int google_chromeec_check_feature(int feature);
 uint8_t google_chromeec_calc_checksum(const uint8_t *data, int size);
 u16 google_chromeec_get_board_version(void);
 u32 google_chromeec_get_sku_id(void);
 int google_chromeec_set_sku_id(u32 skuid);
-u32 google_chromeec_get_events_b(void);
-int google_chromeec_clear_events_b(u32 mask);
+uint64_t  google_chromeec_get_events_b(void);
+int google_chromeec_clear_events_b(uint64_t mask);
 int google_chromeec_kbbacklight(int percent);
 void google_chromeec_post(u8 postcode);
 int google_chromeec_vbnv_context(int is_read, uint8_t *data, int len);
@@ -126,11 +126,11 @@ int crosec_command_proto(struct chromeec_command *cec_command,
 int google_chromeec_command(struct chromeec_command *cec_command);
 
 struct google_chromeec_event_info {
-	uint32_t log_events;
-	uint32_t sci_events;
-	uint32_t s3_wake_events;
-	uint32_t s3_device_events;
-	uint32_t s5_wake_events;
+	uint64_t log_events;
+	uint64_t sci_events;
+	uint64_t s3_wake_events;
+	uint64_t s3_device_events;
+	uint64_t s5_wake_events;
 };
 void google_chromeec_events_init(const struct google_chromeec_event_info *info,
 					bool is_s3_wakeup);
@@ -142,6 +142,6 @@ void google_chromeec_events_init(const struct google_chromeec_event_info *info,
 int google_chromeec_get_mkbp_event(struct ec_response_get_next_event *event);
 
 /* Log host events to eventlog based on the mask provided. */
-void google_chromeec_log_events(u32 mask);
+void google_chromeec_log_events(uint64_t mask);
 
 #endif /* _EC_GOOGLE_CHROMEEC_EC_H */
diff --git a/src/ec/google/chromeec/ec_commands.h b/src/ec/google/chromeec/ec_commands.h
index c4e4e3175a..aa63aa766d 100644
--- a/src/ec/google/chromeec/ec_commands.h
+++ b/src/ec/google/chromeec/ec_commands.h
@@ -597,7 +597,7 @@ enum host_event_code {
 	EC_HOST_EVENT_INVALID = 32
 };
 /* Host event mask */
-#define EC_HOST_EVENT_MASK(event_code) (1UL << ((event_code) - 1))
+#define EC_HOST_EVENT_MASK(event_code) (1ULL << ((event_code) - 1))
 
 /* Arguments at EC_LPC_ADDR_HOST_ARGS */
 struct __ec_align4 ec_lpc_host_args {
diff --git a/src/ec/google/chromeec/smihandler.c b/src/ec/google/chromeec/smihandler.c
index 60b4d15058..71f0d71b8e 100644
--- a/src/ec/google/chromeec/smihandler.c
+++ b/src/ec/google/chromeec/smihandler.c
@@ -57,7 +57,7 @@ static void clear_pending_events(void)
 		;
 }
 
-void chromeec_smi_sleep(int slp_type, uint32_t s3_mask, uint32_t s5_mask)
+void chromeec_smi_sleep(int slp_type, uint64_t s3_mask, uint64_t s5_mask)
 {
 	switch (slp_type) {
 	case ACPI_S3:
@@ -78,8 +78,8 @@ void chromeec_smi_sleep(int slp_type, uint32_t s3_mask, uint32_t s5_mask)
 	clear_pending_events();
 }
 
-void chromeec_smi_device_event_sleep(int slp_type, uint32_t s3_mask,
-				     uint32_t s5_mask)
+void chromeec_smi_device_event_sleep(int slp_type, uint64_t s3_mask,
+				     uint64_t s5_mask)
 {
 	switch (slp_type) {
 	case ACPI_S3:
@@ -96,7 +96,7 @@ void chromeec_smi_device_event_sleep(int slp_type, uint32_t s3_mask,
 	google_chromeec_get_device_current_events();
 }
 
-void chromeec_smi_apmc(int apmc, uint32_t sci_mask, uint32_t smi_mask)
+void chromeec_smi_apmc(int apmc, uint64_t sci_mask, uint64_t smi_mask)
 {
 	switch (apmc) {
 	case APM_CNT_ACPI_ENABLE:
diff --git a/src/ec/google/chromeec/smm.h b/src/ec/google/chromeec/smm.h
index 8265cddcfd..3d63a64bbf 100644
--- a/src/ec/google/chromeec/smm.h
+++ b/src/ec/google/chromeec/smm.h
@@ -25,20 +25,20 @@ void chromeec_smi_process_events(void);
  * Set wake masks according to sleep type, clear SCI and SMI masks,
  * and clear any pending events.
  */
-void chromeec_smi_sleep(int slp_type, uint32_t s3_mask, uint32_t s5_mask);
+void chromeec_smi_sleep(int slp_type, uint64_t s3_mask, uint64_t s5_mask);
 
 /*
  * Set device event masks according to sleep type,
  * and clear any pending device events.
  */
-void chromeec_smi_device_event_sleep(int slp_type, uint32_t s3_mask,
-				     uint32_t s5_mask);
+void chromeec_smi_device_event_sleep(int slp_type, uint64_t s3_mask,
+				     uint64_t s5_mask);
 
 /*
  * Provided the APMC command do the following while clearing pending events.
  * APM_CNT_ACPI_ENABLE: clear SMI mask. set SCI mask.
  * APM_CNT_ACPI_DISABLE: clear SCI mask. set SMI mask.
  */
-void chromeec_smi_apmc(int apmc, uint32_t sci_mask, uint32_t smi_mask);
+void chromeec_smi_apmc(int apmc, uint64_t sci_mask, uint64_t smi_mask);
 
 #endif /* _EC_GOOGLE_CHROMEEC_SMM_H */
diff --git a/src/ec/google/chromeec/switches.c b/src/ec/google/chromeec/switches.c
index e05d37c205..1cf26a2729 100644
--- a/src/ec/google/chromeec/switches.c
+++ b/src/ec/google/chromeec/switches.c
@@ -42,8 +42,8 @@ int get_recovery_mode_switch(void)
 
 int get_recovery_mode_retrain_switch(void)
 {
-	uint32_t events;
-	const uint32_t mask =
+	uint64_t events;
+	const uint64_t mask =
 		EC_HOST_EVENT_MASK(EC_HOST_EVENT_KEYBOARD_RECOVERY_HW_REINIT);
 
 	/*
@@ -53,7 +53,7 @@ int get_recovery_mode_retrain_switch(void)
 	events = google_chromeec_get_events_b();
 
 	if (cbmem_possibly_online()) {
-		const uint32_t *events_save;
+		const uint64_t *events_save;
 
 		events_save = cbmem_find(CBMEM_ID_EC_HOSTEVENT);
 		if (events_save != NULL)
diff --git a/src/mainboard/google/daisy/chromeos.c b/src/mainboard/google/daisy/chromeos.c
index dcac865b41..ae456b47aa 100644
--- a/src/mainboard/google/daisy/chromeos.c
+++ b/src/mainboard/google/daisy/chromeos.c
@@ -67,7 +67,7 @@ void fill_lb_gpios(struct lb_gpios *gpios)
 
 int get_recovery_mode_switch(void)
 {
-	uint32_t ec_events;
+	uint64_t ec_events;
 
 	/* The GPIO is active low. */
 	if (!gpio_get_value(GPIO_Y10)) // RECMODE_GPIO
diff --git a/src/mainboard/google/foster/chromeos.c b/src/mainboard/google/foster/chromeos.c
index bd17c4debe..b4cb33238f 100644
--- a/src/mainboard/google/foster/chromeos.c
+++ b/src/mainboard/google/foster/chromeos.c
@@ -69,7 +69,7 @@ void fill_lb_gpios(struct lb_gpios *gpios)
 int get_recovery_mode_switch(void)
 {
 #if IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC)
-	uint32_t ec_events;
+	uint64_t ec_events;
 
 	ec_events = google_chromeec_get_events_b();
 	return !!(ec_events &
diff --git a/src/mainboard/google/peach_pit/chromeos.c b/src/mainboard/google/peach_pit/chromeos.c
index 4cab7dcb86..e782986cf4 100644
--- a/src/mainboard/google/peach_pit/chromeos.c
+++ b/src/mainboard/google/peach_pit/chromeos.c
@@ -67,7 +67,7 @@ void fill_lb_gpios(struct lb_gpios *gpios)
 
 int get_recovery_mode_switch(void)
 {
-	uint32_t ec_events;
+	uint64_t ec_events;
 
 	/* The GPIO is active low. */
 	if (!gpio_get_value(GPIO_X07)) // RECMODE_GPIO
diff --git a/src/mainboard/google/veyron/chromeos.c b/src/mainboard/google/veyron/chromeos.c
index b8fb3bcd4b..f99cd81aa0 100644
--- a/src/mainboard/google/veyron/chromeos.c
+++ b/src/mainboard/google/veyron/chromeos.c
@@ -57,7 +57,7 @@ void fill_lb_gpios(struct lb_gpios *gpios)
 
 int get_recovery_mode_switch(void)
 {
-	uint32_t ec_events;
+	uint64_t ec_events;
 
 	/* The GPIO is active low. */
 	if (!gpio_get(GPIO_RECOVERY))