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authorAaron Durbin <adurbin@chromium.org>2017-12-14 10:51:13 -0700
committerAaron Durbin <adurbin@chromium.org>2017-12-14 20:44:31 +0000
commit8240a88c053685515e13e3dbb1bebab67c6dc819 (patch)
tree67588417d70b8b2c1014349a14204eae82f38ef7
parent73f073d393c8cf3064434192fd0237a5ecd30de4 (diff)
soc/intel/common/block/i2c: fix orphaned Kconfig options
The SOC_INTEL_COMMON_LPSS_I2C option is no longer used. Likewise, the SOC_INTEL_COMMON_LPSS_I2C_DEBUG option which is dependent on SOC_INTEL_COMMON_LPSS_I2C is by definition not used either. Therefore, remove SOC_INTEL_COMMON_LPSS_I2C and change the name/dependency for SOC_INTEL_COMMON_LPSS_I2C_DEBUG to SOC_INTEL_COMMON_BLOCK_I2C_DEBUG. BUG=b:70232394 Change-Id: Icd77f028b77d8f642690a50be4ac2c50d9ef511a Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/22874 Reviewed-by: Subrata Banik <subrata.banik@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Chris Ching <chingcodes@chromium.org>
-rw-r--r--src/soc/intel/common/Kconfig15
-rw-r--r--src/soc/intel/common/block/i2c/Kconfig8
-rw-r--r--src/soc/intel/common/block/i2c/lpss_i2c.c4
3 files changed, 10 insertions, 17 deletions
diff --git a/src/soc/intel/common/Kconfig b/src/soc/intel/common/Kconfig
index c84b18a822..8f2b60c4db 100644
--- a/src/soc/intel/common/Kconfig
+++ b/src/soc/intel/common/Kconfig
@@ -73,21 +73,6 @@ config SOC_INTEL_COMMON_LPSS_CLOCK_MHZ
at, in MHz. No default is set here as this is an SOC-specific value
and must be provided by the SOC.
-config SOC_INTEL_COMMON_LPSS_I2C
- bool
- default n
- help
- This driver supports the Intel Low Power Subsystem (LPSS) I2C
- controllers that are based on Synopsys DesignWare IP.
-
-config SOC_INTEL_COMMON_LPSS_I2C_DEBUG
- bool "Enable debug output for LPSS I2C transactions"
- default n
- depends on SOC_INTEL_COMMON_LPSS_I2C
- help
- Enable debug output for I2C transactions. This can be useful
- when debugging I2C drivers.
-
config MMA
bool "Enable MMA (Memory Margin Analysis) support for Intel Core"
default n
diff --git a/src/soc/intel/common/block/i2c/Kconfig b/src/soc/intel/common/block/i2c/Kconfig
index 7718f05c58..0e68dac6eb 100644
--- a/src/soc/intel/common/block/i2c/Kconfig
+++ b/src/soc/intel/common/block/i2c/Kconfig
@@ -2,3 +2,11 @@ config SOC_INTEL_COMMON_BLOCK_I2C
bool
help
Intel Processor Common I2C support
+
+config SOC_INTEL_COMMON_BLOCK_I2C_DEBUG
+ bool "Enable debug output for LPSS I2C transactions"
+ default n
+ depends on SOC_INTEL_COMMON_BLOCK_I2C
+ help
+ Enable debug output for I2C transactions. This can be useful
+ when debugging I2C drivers.
diff --git a/src/soc/intel/common/block/i2c/lpss_i2c.c b/src/soc/intel/common/block/i2c/lpss_i2c.c
index 34e04ecf1b..9ae7831524 100644
--- a/src/soc/intel/common/block/i2c/lpss_i2c.c
+++ b/src/soc/intel/common/block/i2c/lpss_i2c.c
@@ -323,7 +323,7 @@ int lpss_i2c_transfer(unsigned int bus,
/* Process each segment */
while (count--) {
- if (CONFIG_SOC_INTEL_COMMON_LPSS_I2C_DEBUG)
+ if (CONFIG_SOC_INTEL_COMMON_BLOCK_I2C_DEBUG)
printk(BIOS_DEBUG, "i2c %u:%02x %s %d bytes : ",
bus, segments->slave,
(segments->flags & I2C_M_RD) ? "R" : "W",
@@ -349,7 +349,7 @@ int lpss_i2c_transfer(unsigned int bus,
}
}
- if (CONFIG_SOC_INTEL_COMMON_LPSS_I2C_DEBUG) {
+ if (CONFIG_SOC_INTEL_COMMON_BLOCK_I2C_DEBUG) {
int j;
for (j = 0; j < segments->len; j++)
printk(BIOS_DEBUG, "%02x ", segments->buf[j]);