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authorPeter Stuge <peter@stuge.se>2008-06-03 00:22:00 +0000
committerPeter Stuge <peter@stuge.se>2008-06-03 00:22:00 +0000
commit6196416c279e0dd95fd132affb9266407311e6d6 (patch)
treed66e4c767c3cc66cbde9e543e0a67681b990d9c5
parent39d4e5f790614db81be84ee6f221c6a055ccb175 (diff)
Ward writes:
SST SST49LF160C is confirmed to work for PROBE READ ERASE WRITE, at least on 2 MCP55-based boards (gigabyte m57sli v1 and supermicro h8dmr). On the m57sli board, it only works > 512K when booted into coreboot; the proprietary bios seems to do something weird where it locks rom access down to the first 512K of the chip. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3360 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
-rw-r--r--util/flashrom/flashchips.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/util/flashrom/flashchips.c b/util/flashrom/flashchips.c
index 48b4d7b447..136e470eeb 100644
--- a/util/flashrom/flashchips.c
+++ b/util/flashrom/flashchips.c
@@ -95,7 +95,7 @@ struct flashchip flashchips[] = {
{"SST", "SST49LF040", SST_ID, SST_49LF040, 512, 4096, TEST_UNTESTED, probe_jedec, erase_49lf040, write_49lf040},
{"SST", "SST49LF040B", SST_ID, SST_49LF040B, 512, 64 * 1024, TEST_UNTESTED, probe_sst_fwhub, erase_sst_fwhub, write_sst_fwhub},
{"SST", "SST49LF080A", SST_ID, SST_49LF080A, 1024, 4096, TEST_OK_PREW, probe_jedec, erase_49lf040, write_49lf040},
- {"SST", "SST49LF160C", SST_ID, SST_49LF160C, 2048, 4 * 1024, TEST_UNTESTED, probe_49lfxxxc, erase_49lfxxxc, write_49lfxxxc},
+ {"SST", "SST49LF160C", SST_ID, SST_49LF160C, 2048, 4 * 1024, TEST_OK_PREW, probe_49lfxxxc, erase_49lfxxxc, write_49lfxxxc},
{"ST", "M25P05-A", ST_ID, ST_M25P05A, 64, 256, TEST_UNTESTED, probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read},
{"ST", "M25P10-A", ST_ID, ST_M25P10A, 128, 256, TEST_UNTESTED, probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read},
{"ST", "M25P20", ST_ID, ST_M25P20, 256, 256, TEST_UNTESTED, probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read},