soc/amd/picasso/acpi: Convert to ASL 2.0 syntax

Change-Id: I1cabe0f55ec55a84f8e9028565be69c9dd997e7c
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45701
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>

4 files changed, 19 insertions, 19 deletions

diff --git a/src/soc/amd/picasso/acpi/cpu.asl b/src/soc/amd/picasso/acpi/cpu.asl
index eb646dec1e..e1b7498f09 100644
--- a/src/soc/amd/picasso/acpi/cpu.asl
+++ b/src/soc/amd/picasso/acpi/cpu.asl
@@ -48,7 +48,7 @@ External (\_SB.C007, DeviceObj)
 /* Return a package containing enabled processor entries */
 Method (PPKG)
 {
-	If (LGreaterEqual (\PCNT, 8)) {
+	If (\PCNT >= 8) {
 		Return (Package ()
 		{
 			\_SB.C000,
@@ -60,7 +60,7 @@ Method (PPKG)
 			\_SB.C006,
 			\_SB.C007
 		})
-	} ElseIf (LGreaterEqual (\PCNT, 4)) {
+	} ElseIf (\PCNT >= 4) {
 		Return (Package ()
 		{
 			\_SB.C000,
@@ -68,7 +68,7 @@ Method (PPKG)
 			\_SB.C002,
 			\_SB.C003
 		})
-	} ElseIf (LGreaterEqual (\PCNT, 2)) {
+	} ElseIf (\PCNT >= 2) {
 		Return (Package ()
 		{
 			\_SB.C000,
diff --git a/src/soc/amd/picasso/acpi/pci_int.asl b/src/soc/amd/picasso/acpi/pci_int.asl
index 2a2a561c8f..8114c52043 100644
--- a/src/soc/amd/picasso/acpi/pci_int.asl
+++ b/src/soc/amd/picasso/acpi/pci_int.asl
@@ -3,7 +3,7 @@
 	Method(\_PIC, 0x01, NotSerialized)
 	{
 		printf("PIC MODE: %o", Arg0)
-		Store(Arg0, PMOD)
+		PMOD = Arg0
 	}
 
 	/* PIC Possible Resource Values */
diff --git a/src/soc/amd/picasso/acpi/sb_pci0_fch.asl b/src/soc/amd/picasso/acpi/sb_pci0_fch.asl
index 9208e136f7..f627a28039 100644
--- a/src/soc/amd/picasso/acpi/sb_pci0_fch.asl
+++ b/src/soc/amd/picasso/acpi/sb_pci0_fch.asl
@@ -9,14 +9,14 @@ External(\_SB.ALIB, MethodObj)
 Method(_OSC,4)
 {
 	/* Check for proper PCI/PCIe UUID */
-	If(LEqual(Arg0,ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766")))
+	If (Arg0 == ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766"))
 	{
 		/* Let OS control everything */
 		Return (Arg3)
 	} Else {
 		CreateDWordField(Arg3,0,CDW1)
-		Or(CDW1,4,CDW1)	// Unrecognized UUID
-		Return(Arg3)
+		CDW1 |= 4	// Unrecognized UUID
+		Return (Arg3)
 	}
 }
 
@@ -78,15 +78,15 @@ Method(_CRS, 0) {
 	 * 32bit (0x00000000 - TOM1) will wrap and give the same
 	 * result as 64bit (0x100000000 - TOM1).
 	 */
-	Store(TOM1, MM1B)
-	ShiftLeft(0x10000000, 4, Local0)
-	Subtract(Local0, TOM1, Local0)
-	Store(Local0, MM1L)
+	MM1B = TOM1
+	Local0 = 0x10000000 << 4
+	Local0 -= TOM1
+	MM1L = Local0
 
 	CreateWordField(CRES, ^PSB0._MAX, BMAX)
 	CreateWordField(CRES, ^PSB0._LEN, BLEN)
-	Store(CONFIG_MMCONF_BUS_NUMBER - 1, BMAX)
-	Store(CONFIG_MMCONF_BUS_NUMBER, BLEN)
+	BMAX = CONFIG_MMCONF_BUS_NUMBER - 1
+	BLEN = CONFIG_MMCONF_BUS_NUMBER
 
 	Return(CRES) /* note to change the Name buffer */
 } /* end of Method(_SB.PCI0._CRS) */
diff --git a/src/soc/amd/picasso/acpi/sleepstates.asl b/src/soc/amd/picasso/acpi/sleepstates.asl
index 88c6efc960..03d28bb4f8 100644
--- a/src/soc/amd/picasso/acpi/sleepstates.asl
+++ b/src/soc/amd/picasso/acpi/sleepstates.asl
@@ -3,25 +3,25 @@
 /* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
 Name(SSFG, 0x09)
 If (CONFIG(HAVE_ACPI_RESUME)) {
-	Store(0x0D, SSFG)
+	SSFG = 0x0D
 }
 If (CONFIG(DISABLE_ACPI_HIBERNATE)) {
-	Store(And(SSFG, 0xF7), SSFG)
+	SSFG &= 0xF7
 }
 
 /* Supported sleep states: */
 Name(\_S0, Package () {0x00, 0x00, 0x00, 0x00} )	/* (S0) - working state */
 
-If (And(SSFG, 0x01)) {
+If (SSFG & 0x01) {
 	Name(\_S1, Package () {0x01, 0x01, 0x00, 0x00} )	/* (S1) - sleeping w/CPU context */
 }
-If (And(SSFG, 0x02)) {
+If (SSFG & 0x02) {
 	Name(\_S2, Package () {0x02, 0x02, 0x00, 0x00} )	/* (S2) - "light" Suspend to RAM */
 }
-If (And(SSFG, 0x04)) {
+If (SSFG & 0x04) {
 	Name(\_S3, Package () {0x03, 0x03, 0x00, 0x00} )	/* (S3) - Suspend to RAM */
 }
-If (And(SSFG, 0x08)) {
+If (SSFG & 0x08) {
 	Name(\_S4, Package () {0x04, 0x04, 0x00, 0x00} )	/* (S4) - Suspend to Disk */
 }