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authorFurquan Shaikh <furquan@google.com>2020-06-29 18:50:50 -0700
committerFurquan Shaikh <furquan@google.com>2020-07-01 17:55:12 +0000
commit189a5c7cf6cee32e823dc4c2589ff566703a8cfd (patch)
tree5b9e3294a66bc8ab728c67b9244b24b5f9d70e6a
parent9f47a053a35ea11f0906760bca023f4f99241635 (diff)
mb/google/zork: Move GPIO sleep table to dalboz and trembyle reference
This change moves variant_sleep_gpio_table() definition to dalboz and trembyle references to allow each to make their own changes. BUG=b:159749536, b:159453643 Signed-off-by: Furquan Shaikh <furquan@google.com> Change-Id: I15b19cea05f1a540c56b6bc0507306d2348ac17f Reviewed-on: https://review.coreboot.org/c/coreboot/+/42937 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
-rw-r--r--src/mainboard/google/zork/variants/baseboard/Makefile.inc3
-rw-r--r--src/mainboard/google/zork/variants/baseboard/gpio_baseboard_common.c17
-rw-r--r--src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c17
-rw-r--r--src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c17
4 files changed, 36 insertions, 18 deletions
diff --git a/src/mainboard/google/zork/variants/baseboard/Makefile.inc b/src/mainboard/google/zork/variants/baseboard/Makefile.inc
index 0f025e0d84..c09fc7ebb7 100644
--- a/src/mainboard/google/zork/variants/baseboard/Makefile.inc
+++ b/src/mainboard/google/zork/variants/baseboard/Makefile.inc
@@ -24,7 +24,8 @@ ramstage-$(CONFIG_BOARD_GOOGLE_BASEBOARD_DALBOZ) += fsps_baseboard_dalboz.c
ramstage-y += helpers.c
ramstage-y += tpm_tis.c
-smm-y += gpio_baseboard_common.c
+smm-$(CONFIG_BOARD_GOOGLE_BASEBOARD_TREMBYLE) += gpio_baseboard_trembyle.c
+smm-$(CONFIG_BOARD_GOOGLE_BASEBOARD_DALBOZ) += gpio_baseboard_dalboz.c
# Add OEM ID table
ifeq ($(CONFIG_USE_OEM_BIN),y)
diff --git a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_common.c b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_common.c
index aacf14b7c5..a4e86487bd 100644
--- a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_common.c
+++ b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_common.c
@@ -30,20 +30,3 @@ const __weak struct soc_amd_gpio *variant_early_gpio_table(size_t *size)
*size = ARRAY_SIZE(early_gpio_table);
return early_gpio_table;
}
-
-static const struct soc_amd_gpio gpio_sleep_table[] = {
- /* PEN_POWER_EN */
- PAD_GPO(GPIO_5, LOW),
- /* PCIE_RST1_L */
- PAD_GPO(GPIO_27, LOW),
- /* NVME_AUX_RESET_L */
- PAD_GPO(GPIO_40, LOW),
- /* EN_PWR_CAMERA */
- PAD_GPO(GPIO_76, LOW),
-};
-
-const __weak struct soc_amd_gpio *variant_sleep_gpio_table(size_t *size, int slp_typ)
-{
- *size = ARRAY_SIZE(gpio_sleep_table);
- return gpio_sleep_table;
-}
diff --git a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c
index c2438768c8..d6d463aaca 100644
--- a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c
+++ b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c
@@ -277,3 +277,20 @@ __weak void variant_pcie_power_reset_configure(void)
else
wifi_power_reset_configure_pre_v3();
}
+
+static const struct soc_amd_gpio gpio_sleep_table[] = {
+ /* PEN_POWER_EN */
+ PAD_GPO(GPIO_5, LOW),
+ /* PCIE_RST1_L */
+ PAD_GPO(GPIO_27, LOW),
+ /* NVME_AUX_RESET_L */
+ PAD_GPO(GPIO_40, LOW),
+ /* EN_PWR_CAMERA */
+ PAD_GPO(GPIO_76, LOW),
+};
+
+const __weak struct soc_amd_gpio *variant_sleep_gpio_table(size_t *size, int slp_typ)
+{
+ *size = ARRAY_SIZE(gpio_sleep_table);
+ return gpio_sleep_table;
+}
diff --git a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c
index 21917939ae..c9ad96bfde 100644
--- a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c
+++ b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c
@@ -268,3 +268,20 @@ __weak void variant_pcie_power_reset_configure(void)
else
wifi_power_reset_configure_pre_v3();
}
+
+static const struct soc_amd_gpio gpio_sleep_table[] = {
+ /* PEN_POWER_EN */
+ PAD_GPO(GPIO_5, LOW),
+ /* PCIE_RST1_L */
+ PAD_GPO(GPIO_27, LOW),
+ /* NVME_AUX_RESET_L */
+ PAD_GPO(GPIO_40, LOW),
+ /* EN_PWR_CAMERA */
+ PAD_GPO(GPIO_76, LOW),
+};
+
+const __weak struct soc_amd_gpio *variant_sleep_gpio_table(size_t *size, int slp_typ)
+{
+ *size = ARRAY_SIZE(gpio_sleep_table);
+ return gpio_sleep_table;
+}