Refactor copy_and_run so that it uses a single code base instead of

3 (with one of them way too much assembler code).

On the way, I had to make some changes to the way the code is built, 
which is an effort I want to expand over time.
Right now, large portions of the in-ROM part of coreboot is compiled as 
a single file, with lots of .c files including other .c files.
That has its justification for pre-raminit code, but it also affects 
lots of post-raminit code (memcpy doesn't really make sense before 
raminit, or at least CAR)

The coreboot_apc code (AMD boards) gained some .c includes because I 
don't know that part of the code enough to really rework it and only 
have limited possibilities to test it. The includes should give an 
identical situation for this part of the code.

This change was posted as set of 6 patches to the list, but they
were mostly split for review purposes, hence commit them all at once.
They can still be backed up using the patch files, if necessary.

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4233 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

64 files changed, 129 insertions, 473 deletions

diff --git a/src/arch/i386/init/crt0.S.lb b/src/arch/i386/init/crt0.S.lb
index de83b6c417..c54e7053d0 100644
--- a/src/arch/i386/init/crt0.S.lb
+++ b/src/arch/i386/init/crt0.S.lb
@@ -69,106 +69,18 @@ __main:
 	 * the location it is compiled to run at.
 	 * Normally this is copying from FLASH ROM to RAM.
 	 */
-#if !CONFIG_COMPRESS
+	movl	%ebp, %esi
+	movl	$0x4000000, %esp
+	movl	%esp, %ebp
+	pushl %esi
 	movl	$_liseg, %esi
 	movl	$_iseg,  %edi
 	movl	$_eiseg, %ecx
 	subl	%edi, %ecx
-	movb	%cl, %al
-	shrl	$2, %ecx
-	andb	$3, %al
-	rep	movsl
-	movb	%al, %cl
-	rep	movsb
-#else
-	leal	4+_liseg, %esi
-	leal	_iseg, %edi
-	movl	%ebp, %esp	/* preserve %ebp */
-	movl	$-1, %ebp	/* last_m_off = -1 */
-	jmp	dcl1_n2b
-
-/* ------------- DECOMPRESSION -------------
-
- Input:
-   %esi - source
-   %edi - dest
-   %ebp - -1
-   cld
-
- Output:
-   %eax - 0
-   %ecx - 0
-*/
-
-.macro getbit bits
-.if	\bits == 1
-	addl	%ebx, %ebx
-	jnz	1f
-.endif
-	movl	(%esi), %ebx
-	subl	$-4, %esi	/* sets carry flag */
-	adcl	%ebx, %ebx
-1:
-.endm
-
-decompr_literals_n2b:
-	movsb
-
-decompr_loop_n2b:
-	addl	%ebx, %ebx
-	jnz	dcl2_n2b
-dcl1_n2b:
-	getbit	32
-dcl2_n2b:
-	jc	decompr_literals_n2b
-	xorl	%eax, %eax
-	incl	%eax		/* m_off = 1 */
-loop1_n2b:
-	getbit	1
-	adcl	%eax, %eax	/* m_off = m_off*2 + getbit() */
-	getbit	1
-	jnc	loop1_n2b	/* while(!getbit()) */
-	xorl	%ecx, %ecx
-	subl	$3, %eax
-	jb	decompr_ebpeax_n2b	/* if (m_off == 2) goto decompr_ebpeax_n2b ? */
-	shll	$8, %eax	
-	movb	(%esi), %al	/* m_off = (m_off - 3)*256 + src[ilen++] */
-	incl	%esi
-	xorl	$-1, %eax	
-	jz	decompr_end_n2b	/* if (m_off == 0xffffffff) goto decomp_end_n2b */
-	movl	%eax, %ebp	/* last_m_off = m_off ?*/
-decompr_ebpeax_n2b:
-	getbit	1		
-	adcl	%ecx, %ecx	/* m_len = getbit() */
-	getbit	1
-	adcl	%ecx, %ecx	/* m_len = m_len*2 + getbit()) */
-	jnz	decompr_got_mlen_n2b	/* if (m_len == 0) goto decompr_got_mlen_n2b */
-	incl	%ecx		/* m_len++ */
-loop2_n2b:
-	getbit	1	
-	adcl	%ecx, %ecx	/* m_len = m_len*2 + getbit() */
-	getbit	1
-	jnc	loop2_n2b	/* while(!getbit()) */
-	incl	%ecx
-	incl	%ecx		/* m_len += 2 */
-decompr_got_mlen_n2b:
-	cmpl	$-0xd00, %ebp
-	adcl	$1, %ecx	/* m_len = m_len + 1 + (last_m_off > 0xd00) */
-	movl	%esi, %edx
-	leal	(%edi,%ebp), %esi	/* m_pos = dst + olen + -m_off  */
-	rep
-	movsb			/* dst[olen++] = *m_pos++ while(m_len > 0) */
-	movl	%edx, %esi
-	jmp	decompr_loop_n2b
-decompr_end_n2b:
-	intel_chip_post_macro(0x12)		/* post 12 */
-
-	movl	%esp, %ebp
-#endif
-
-	CONSOLE_DEBUG_TX_STRING($str_pre_main)
-	leal	_iseg, %edi
-	jmp	*%edi
+	pushl %ecx
+	pushl %edi
+	pushl %esi
+	call copy_and_run_core
 
 .Lhlt:	
 	intel_chip_post_macro(0xee)	/* post fe */
diff --git a/src/arch/i386/init/ldscript.lb b/src/arch/i386/init/ldscript.lb
index 99b0ce55bf..50a8c9965d 100644
--- a/src/arch/i386/init/ldscript.lb
+++ b/src/arch/i386/init/ldscript.lb
@@ -48,6 +48,7 @@ SECTIONS
 		_rom = .;
 		*(.rom.text);
 		*(.rom.data);
+		*(.rodata.*);
 		*(.rom.data.*);
 		. = ALIGN(16);
 		_erom = .;
diff --git a/src/arch/i386/init/ldscript_failover.lb b/src/arch/i386/init/ldscript_failover.lb
index 79fd7b4b96..064f159a50 100644
--- a/src/arch/i386/init/ldscript_failover.lb
+++ b/src/arch/i386/init/ldscript_failover.lb
@@ -42,6 +42,7 @@ SECTIONS
 		*(.rom.text);
 		*(.rom.data);
 		*(.rom.data.*);
+		*(.rodata.*);
 		. = ALIGN(16);
 		_erom = .;
 	}
diff --git a/src/arch/i386/init/ldscript_fallback.lb b/src/arch/i386/init/ldscript_fallback.lb
index 3fced4c387..a46c374520 100644
--- a/src/arch/i386/init/ldscript_fallback.lb
+++ b/src/arch/i386/init/ldscript_fallback.lb
@@ -52,6 +52,8 @@ SECTIONS
 		_rom = .;
 		*(.rom.text);
 		*(.rom.data);
+		*(.init.rodata.*);
+		*(.rodata.*);
 		*(.rom.data.*);
 		. = ALIGN(16);
 		_erom = .;
diff --git a/src/arch/i386/lib/Config.lb b/src/arch/i386/lib/Config.lb
index e7d895ccc2..3356b8f4f5 100644
--- a/src/arch/i386/lib/Config.lb
+++ b/src/arch/i386/lib/Config.lb
@@ -1,5 +1,6 @@
 uses CONFIG_USE_INIT
 uses CONFIG_USE_PRINTK_IN_CAR
+uses USE_FAILOVER_IMAGE
 
 object c_start.S
 object cpu.c
@@ -9,9 +10,9 @@ object pci_ops_mmconf.c
 object pci_ops_auto.c
 object exception.c
 
-if CONFIG_USE_INIT
-	if CONFIG_USE_PRINTK_IN_CAR
-		initobject printk_init.o
-	end
-end
+initobject printk_init.o
 
+if USE_FAILOVER_IMAGE
+else
+	initobject copy_and_run.o
+end
diff --git a/src/arch/i386/lib/console.c b/src/arch/i386/lib/console.c
index abeb2d90a1..47015bc75c 100644
--- a/src/arch/i386/lib/console.c
+++ b/src/arch/i386/lib/console.c
@@ -13,12 +13,6 @@ static void __console_tx_byte(unsigned char byte)
 
 #include "console_printk.c"
 
-#if CONFIG_USE_INIT == 0
-// do_printk
-#include "../../../console/vtxprintf.c"
-#include "printk_init.c"
-#endif
-
 #endif /* CONFIG_USE_PRINTK_IN_CAR */
 
 #ifndef COREBOOT_EXTRA_VERSION
diff --git a/src/boot/Config.lb b/src/boot/Config.lb
index f9206bd3aa..700f19d917 100644
--- a/src/boot/Config.lb
+++ b/src/boot/Config.lb
@@ -1,7 +1,8 @@
-object elfboot.o
 object hardwaremain.o
 if CONFIG_CBFS
 	object selfboot.o
+else
+	object elfboot.o
 end
 if CONFIG_FS_PAYLOAD
 	object filo.o
diff --git a/src/boot/hardwaremain.c b/src/boot/hardwaremain.c
index c22754fe28..d6e88de374 100644
--- a/src/boot/hardwaremain.c
+++ b/src/boot/hardwaremain.c
@@ -103,7 +103,7 @@ void hardwaremain(int boot_complete)
 # else
 	void (*pl)(void) = cbfs_load_payload(lb_mem, "normal/payload");
 # endif
-#endif
+#else
 
 #if CONFIG_FS_PAYLOAD == 1
 #warning "CONFIG_FS_PAYLOAD is deprecated."
@@ -112,6 +112,7 @@ void hardwaremain(int boot_complete)
 #warning "elfboot will soon be deprecated."
 	elfboot(lb_mem);
 #endif
+#endif
 	printk_err("Boot failed.\n");
 }
 
diff --git a/src/console/Config.lb b/src/console/Config.lb
index 7a1672e494..eda9cf45b6 100644
--- a/src/console/Config.lb
+++ b/src/console/Config.lb
@@ -28,8 +28,4 @@ object console.o
 object vtxprintf.o
 object vsprintf.o
 
-if CONFIG_USE_INIT
-#	if CONFIG_USE_PRINTK_IN_CAR
-	initobject vtxprintf.o
-#	end
-end
+initobject vtxprintf.o
diff --git a/src/cpu/amd/car/copy_and_run.c b/src/cpu/amd/car/copy_and_run.c
index 80fc84072b..e0fa098833 100644
--- a/src/cpu/amd/car/copy_and_run.c
+++ b/src/cpu/amd/car/copy_and_run.c
@@ -2,119 +2,36 @@
 	moved from nrv2v.c and some lines from crt0.S
    2006/05/02 - stepan: move nrv2b to an extra file.
 */
-static inline void print_debug_cp_run(const char *strval, uint32_t val)
-{
-#if CONFIG_USE_PRINTK_IN_CAR
-        printk_debug("%s%08x\r\n", strval, val);
-#else
-        print_debug(strval); print_debug_hex32(val); print_debug("\r\n");
-#endif
-}
 
-#if CONFIG_COMPRESS
-#define ENDIAN   0
-#define BITSIZE 32
-#include "lib/nrv2b.c"
-#endif
+void copy_and_run_core(u8 *src, u8 *dst, unsigned long ilen, unsigned ebp);
 
+extern u8 _liseg, _iseg, _eiseg;
 
 static void copy_and_run(void)
 {
 	uint8_t *src, *dst; 
-        unsigned long ilen, olen;
-
-
-#if !CONFIG_COMPRESS 
-	print_debug("Copying coreboot to RAM.\r\n");
-	__asm__ volatile (
-		"leal _liseg, %0\n\t"
-		"leal _iseg, %1\n\t"
-		"leal _eiseg, %2\n\t"
-		"subl %1, %2\n\t"
-		: "=a" (src), "=b" (dst), "=c" (olen)
-	);
-	memcpy(dst, src, olen);
-#else 
-	print_debug("Uncompressing coreboot to RAM.\r\n");
-
-        __asm__ volatile (
-	        "leal _liseg, %0\n\t"
-	        "leal _iseg,  %1\n\t"
-                : "=a" (src) , "=b" (dst)
-        );
-
-	print_debug_cp_run("src=",(uint32_t)src); 
-	print_debug_cp_run("dst=",(uint32_t)dst);
-
-//	dump_mem(src, src+0x100);
-
-	olen = unrv2b(src, dst, &ilen);
-	print_debug_cp_run("coreboot_ram.nrv2b length = ", ilen);
-
-#endif
-//	dump_mem(dst, dst+0x100);
-
-	print_debug_cp_run("coreboot_ram.bin   length = ", olen);
+        unsigned long ilen;
 
-	print_debug("Jumping to coreboot.\r\n");
-
-        __asm__ volatile (
-                "xorl %ebp, %ebp\n\t" /* cpu_reset for hardwaremain dummy */
-		"cli\n\t"
-		"leal    _iseg, %edi\n\t"
-		"jmp     *%edi\n\t"
-	);
+	src = &_liseg;
+	dst = &_iseg;
+	ilen = &_eiseg - dst;
 
+	copy_and_run_core(src, dst, ilen, 0);
 }
 
 #if CONFIG_AP_CODE_IN_CAR == 1
 
+extern u8 _liseg_apc, _iseg_apc, _eiseg_apc;
+
 static void copy_and_run_ap_code_in_car(unsigned ret_addr)
 {
         uint8_t *src, *dst;
-        unsigned long ilen, olen;
-
-//        print_debug("Copying coreboot AP code to CAR.\r\n");
-
-#if !CONFIG_COMPRESS
-        __asm__ volatile (
-                "leal _liseg_apc, %0\n\t"
-                "leal _iseg_apc, %1\n\t"
-                "leal _eiseg_apc, %2\n\t"
-                "subl %1, %2\n\t"
-                : "=a" (src), "=b" (dst), "=c" (olen)
-        );
-        memcpy(dst, src, olen);
-#else
-
-        __asm__ volatile (
-                "leal _liseg_apc, %0\n\t"
-                "leal _iseg_apc,  %1\n\t"
-                : "=a" (src) , "=b" (dst)
-        );
-
-//        print_debug_cp_run("src=",(uint32_t)src);
-//        print_debug_cp_run("dst=",(uint32_t)dst);
-
-//      dump_mem(src, src+0x100);
-
-        olen = unrv2b(src, dst, &ilen);
-//        print_debug_cp_run("coreboot_apc.nrv2b length = ", ilen);
-
-#endif
-//      dump_mem(dst, dst+0x100);
-
-//        print_debug_cp_run("coreboot_apc.bin   length = ", olen);
-
-//        print_debug("Jumping to coreboot AP code in CAR.\r\n");
+        unsigned long ilen;
 
-        __asm__ volatile (
-                "movl %0, %%ebp\n\t" /* cpu_reset for hardwaremain dummy */
-                "cli\n\t"
-                "leal    _iseg_apc, %%edi\n\t"
-                "jmp     *%%edi\n\t"
-		:: "a"(ret_addr)
-        );
+	src = &_liseg_apc;
+	dst = &_iseg_apc;
+	ilen = &_eiseg_apc - dst;
 
+	copy_and_run_core(src, dst, ilen, ret_addr);
 }
 #endif
diff --git a/src/cpu/intel/model_6ex/cache_as_ram_disable.c b/src/cpu/intel/model_6ex/cache_as_ram_disable.c
index 10e46656c1..981aac1399 100644
--- a/src/cpu/intel/model_6ex/cache_as_ram_disable.c
+++ b/src/cpu/intel/model_6ex/cache_as_ram_disable.c
@@ -102,6 +102,11 @@ cpu_reset_x:
 			:"=a" (new_cpu_reset)
 		);
 
+#ifdef CONFIG_DEACTIVATE_CAR
+		print_debug("Deactivating CAR");
+#include CONFIG_DEACTIVATE_CAR_FILE
+		print_debug(" - Done.\r\n");
+#endif
 		/* Copy and execute coreboot_ram */
 		copy_and_run(new_cpu_reset);
 		/* We will not return */
diff --git a/src/cpu/intel/model_6fx/cache_as_ram_disable.c b/src/cpu/intel/model_6fx/cache_as_ram_disable.c
index 10e46656c1..981aac1399 100644
--- a/src/cpu/intel/model_6fx/cache_as_ram_disable.c
+++ b/src/cpu/intel/model_6fx/cache_as_ram_disable.c
@@ -102,6 +102,11 @@ cpu_reset_x:
 			:"=a" (new_cpu_reset)
 		);
 
+#ifdef CONFIG_DEACTIVATE_CAR
+		print_debug("Deactivating CAR");
+#include CONFIG_DEACTIVATE_CAR_FILE
+		print_debug(" - Done.\r\n");
+#endif
 		/* Copy and execute coreboot_ram */
 		copy_and_run(new_cpu_reset);
 		/* We will not return */
diff --git a/src/cpu/x86/car/copy_and_run.c b/src/cpu/x86/car/copy_and_run.c
index 7a070ee648..14fe83d667 100644
--- a/src/cpu/x86/car/copy_and_run.c
+++ b/src/cpu/x86/car/copy_and_run.c
@@ -1,83 +1,23 @@
-/* by yhlu 6.2005 
-	moved from nrv2v.c and some lines from crt0.S
-   2006/05/02 - stepan: move nrv2b to an extra file.
+/* Copyright (C) 2009 coresystems GmbH
+   (Written by Patrick Georgi <patrick.georgi@coresystems.de> for coresystems GmbH
 */
 
-#if CONFIG_COMPRESS
-#define ENDIAN   0
-#define BITSIZE 32
-#include "lib/nrv2b.c"
-#endif
+void copy_and_run_core(u8 *src, u8 *dst, unsigned long ilen, unsigned ebp);
+
+extern u8 _liseg, _iseg, _eiseg;
 
 static void copy_and_run(unsigned cpu_reset)
 {
 	uint8_t *src, *dst; 
-#if !CONFIG_COMPRESS
-	unsigned long dst_len;
-#endif
-        unsigned long ilen, olen;
-
-
-#if !CONFIG_COMPRESS 
-	print_debug("Copying coreboot to RAM.\r\n");
-	__asm__ volatile (
-		"leal _liseg, %0\n\t"
-		"leal _iseg, %1\n\t"
-		"leal _eiseg, %2\n\t"
-		"subl %1, %2\n\t"
-		: "=a" (src), "=b" (dst), "=c" (dst_len)
-	);
-	memcpy(src, dst, dst_len);
-#else 
-	print_debug("Uncompressing coreboot to RAM.\r\n");
-
-        __asm__ volatile (
-	        "leal _liseg, %0\n\t"
-	        "leal _iseg,  %1\n\t"
-                : "=a" (src) , "=b" (dst)
-        );
-
-#if CONFIG_USE_INIT		
-	printk_spew("src=%08x\r\n",src); 
-	printk_spew("dst=%08x\r\n",dst);
-#else
-        print_spew("src="); print_spew_hex32((uint32_t)src); print_spew("\r\n");
-        print_spew("dst="); print_spew_hex32((uint32_t)dst); print_spew("\r\n");
-#endif
-	
-//	dump_mem(src, src+0x100);
+        unsigned long ilen;
 
-	olen = unrv2b(src, dst, &ilen);
 
-#endif
-//	dump_mem(dst, dst+0x100);
-#if CONFIG_USE_INIT
-	printk_spew("coreboot_ram.bin length = %08x\r\n", olen);
-#else
-	print_spew("coreboot_ram.bin length = "); print_spew_hex32(olen); print_spew("\r\n");
-#endif
-#ifdef CONFIG_DEACTIVATE_CAR
-	print_debug("Deactivating CAR");
-#include CONFIG_DEACTIVATE_CAR_FILE
-	print_debug(" - Done.\r\n");
-#endif
-	print_debug("Jumping to coreboot.\r\n");
+	src = &_liseg;
+	dst = &_iseg;
+	ilen = &_eiseg - dst;
 
-	if(cpu_reset == 1 ) {
-		__asm__ volatile (
-			"movl $0xffffffff, %ebp\n\t"
-		);
-	}
-	else {
-                __asm__ volatile (
-                        "xorl %ebp, %ebp\n\t"
-                );
-	}
-	
-	__asm__ volatile (
-		"cli\n\t"
-		"leal    _iseg, %edi\n\t"
-		"jmp     *%edi\n\t"
-	);
+	if (cpu_reset == 1) cpu_reset = -1;
+	else cpu_reset = 0;
 
+	copy_and_run_core(src, dst, ilen, cpu_reset);
 }
diff --git a/src/lib/Config.lb b/src/lib/Config.lb
index 6f428ad08f..7585761eb8 100644
--- a/src/lib/Config.lb
+++ b/src/lib/Config.lb
@@ -21,12 +21,10 @@ object version.o
 # Force version.o to recompile every time
 makedefine .PHONY : version.o
 
-if CONFIG_USE_INIT
-	initobject uart8250.c
-	initobject memset.o
-	initobject memcpy.o
-	initobject memcmp.o
-end
+initobject uart8250.c
+initobject memset.o
+initobject memcpy.o
+initobject memcmp.o
 
 if CONFIG_CBFS
 	object cbfs.o
diff --git a/src/mainboard/amd/dbm690t/cache_as_ram_auto.c b/src/mainboard/amd/dbm690t/cache_as_ram_auto.c
index 76ce93bf07..a1e6d99e4d 100644
--- a/src/mainboard/amd/dbm690t/cache_as_ram_auto.c
+++ b/src/mainboard/amd/dbm690t/cache_as_ram_auto.c
@@ -37,6 +37,7 @@
 #define SMBUS_HUB 0x71
 
 #include <stdint.h>
+#include <string.h>
 #include <device/pci_def.h>
 #include <arch/io.h>
 #include <device/pnp_def.h>
@@ -54,10 +55,6 @@
 #include "cpu/amd/model_fxx/apic_timer.c"
 #include "lib/delay.c"
 
-#if CONFIG_USE_INIT == 0
-#include "lib/memcpy.c"
-#endif
-
 #include "cpu/x86/lapic/boot_cpu.c"
 #include "northbridge/amd/amdk8/reset_test.c"
 #include "northbridge/amd/amdk8/debug.c"
diff --git a/src/mainboard/amd/pistachio/cache_as_ram_auto.c b/src/mainboard/amd/pistachio/cache_as_ram_auto.c
index c348a61f9d..5aaf399583 100644
--- a/src/mainboard/amd/pistachio/cache_as_ram_auto.c
+++ b/src/mainboard/amd/pistachio/cache_as_ram_auto.c
@@ -31,6 +31,7 @@
 #define DIMM1 0x51
 
 #include <stdint.h>
+#include <string.h>
 #include <device/pci_def.h>
 #include <arch/io.h>
 #include <device/pnp_def.h>
@@ -48,10 +49,6 @@
 #include "cpu/amd/model_fxx/apic_timer.c"
 #include "lib/delay.c"
 
-#if CONFIG_USE_INIT == 0
-#include "lib/memcpy.c"
-#endif
-
 #include "cpu/x86/lapic/boot_cpu.c"
 #include "northbridge/amd/amdk8/reset_test.c"
 #include "northbridge/amd/amdk8/debug.c"
diff --git a/src/mainboard/amd/serengeti_cheetah/apc_auto.c b/src/mainboard/amd/serengeti_cheetah/apc_auto.c
index 63a8a085eb..584309508e 100644
--- a/src/mainboard/amd/serengeti_cheetah/apc_auto.c
+++ b/src/mainboard/amd/serengeti_cheetah/apc_auto.c
@@ -21,12 +21,15 @@
 #include "option_table.h"
 #include "pc80/mc146818rtc_early.c"
 #include "pc80/serial.c"
+#include "./arch/i386/lib/printk_init.c"
 
 #if CONFIG_USE_INIT == 0
 	#include "lib/memcpy.c"
 #endif
 
 #include "arch/i386/lib/console.c"
+#include "lib/uart8250.c"
+#include "console/vtxprintf.c"
 
 #if 0 
 static void post_code(uint8_t value) {
diff --git a/src/mainboard/amd/serengeti_cheetah/cache_as_ram_auto.c b/src/mainboard/amd/serengeti_cheetah/cache_as_ram_auto.c
index 7e60c2c7a1..0df32db32c 100644
--- a/src/mainboard/amd/serengeti_cheetah/cache_as_ram_auto.c
+++ b/src/mainboard/amd/serengeti_cheetah/cache_as_ram_auto.c
@@ -24,6 +24,7 @@
 #endif
 
 #include <stdint.h>
+#include <string.h>
 #include <device/pci_def.h>
 #include <device/pci_ids.h>
 #include <arch/io.h>
@@ -63,9 +64,6 @@ static void post_code(uint8_t value) {
 
 #include "lib/delay.c"
 
-#if CONFIG_USE_INIT == 0
-	#include "lib/memcpy.c"
-#endif
 #include "northbridge/amd/amdk8/debug.c"
 #include "cpu/amd/mtrr/amd_earlymtrr.c"
 #include "superio/winbond/w83627hf/w83627hf_early_serial.c"
diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/Options.lb b/src/mainboard/amd/serengeti_cheetah_fam10/Options.lb
index 235f1c71a0..c06453c700 100644
--- a/src/mainboard/amd/serengeti_cheetah_fam10/Options.lb
+++ b/src/mainboard/amd/serengeti_cheetah_fam10/Options.lb
@@ -136,7 +136,7 @@ default ROM_SIZE=524288
 #FALLBACK: 512K - 4K
 default FALLBACK_SIZE=0x7f000
 #FAILOVER: 4k
-default FAILOVER_SIZE=0x01000
+default FAILOVER_SIZE=0x02000
 
 #more 1M for pgtbl
 #if there is RAM on node0, we need to set it to 32M, otherwise can not access CAR on node0, and RAM on node1 at same time.
diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/cache_as_ram_auto.c b/src/mainboard/amd/serengeti_cheetah_fam10/cache_as_ram_auto.c
index d7b2379c24..38196b262e 100644
--- a/src/mainboard/amd/serengeti_cheetah_fam10/cache_as_ram_auto.c
+++ b/src/mainboard/amd/serengeti_cheetah_fam10/cache_as_ram_auto.c
@@ -45,6 +45,7 @@
 #define FAM10_SET_FIDVID_CORE_RANGE 0
 
 #include <stdint.h>
+#include <string.h>
 #include <device/pci_def.h>
 #include <device/pci_ids.h>
 #include <arch/io.h>
@@ -81,10 +82,6 @@ int do_printk(int msg_level, const char *fmt, ...) __attribute__((format(printf,
 
 #if (USE_FAILOVER_IMAGE == 0)
 
- #if CONFIG_USE_INIT == 0
- #include "lib/memcpy.c"
- #endif
-
 #include "northbridge/amd/amdfam10/debug.c"
 #include "superio/winbond/w83627hf/w83627hf_early_serial.c"
 #include "cpu/amd/mtrr/amd_earlymtrr.c"
diff --git a/src/mainboard/arima/hdama/cache_as_ram_auto.c b/src/mainboard/arima/hdama/cache_as_ram_auto.c
index 438bc306bc..fe19502543 100644
--- a/src/mainboard/arima/hdama/cache_as_ram_auto.c
+++ b/src/mainboard/arima/hdama/cache_as_ram_auto.c
@@ -21,10 +21,6 @@
 #include "cpu/amd/model_fxx/apic_timer.c"
 #include "lib/delay.c"
 
-#if CONFIG_USE_INIT == 0
-#include "lib/memcpy.c"
-#endif
-
 #include "cpu/x86/lapic/boot_cpu.c"
 #include "northbridge/amd/amdk8/reset_test.c"
 #include "northbridge/amd/amdk8/debug.c"
diff --git a/src/mainboard/asus/a8n_e/cache_as_ram_auto.c b/src/mainboard/asus/a8n_e/cache_as_ram_auto.c
index 44f0bb3e96..1e02e6e0be 100644
--- a/src/mainboard/asus/a8n_e/cache_as_ram_auto.c
+++ b/src/mainboard/asus/a8n_e/cache_as_ram_auto.c
@@ -38,6 +38,7 @@
 #endif
 
 #include <stdint.h>
+#include <string.h>
 #include <device/pci_def.h>
 #include <arch/io.h>
 #include <device/pnp_def.h>
@@ -54,10 +55,6 @@
 /* Used by ck894_early_setup(). */
 #define CK804_NUM 1
 
-#if CONFIG_USE_INIT == 0
-#include "lib/memcpy.c"
-#endif
-
 #include <cpu/amd/model_fxx_rev.h>
 #include "pc80/serial.c"
 #include "arch/i386/lib/console.c"
diff --git a/src/mainboard/asus/a8v-e_se/cache_as_ram_auto.c b/src/mainboard/asus/a8v-e_se/cache_as_ram_auto.c
index 8aeaff5fcb..0a8ca60a8b 100644
--- a/src/mainboard/asus/a8v-e_se/cache_as_ram_auto.c
+++ b/src/mainboard/asus/a8v-e_se/cache_as_ram_auto.c
@@ -43,6 +43,7 @@ unsigned int get_sbdn(unsigned bus);
 /* #define DEBUG_SMBUS 1 */
 
 #include <stdint.h>
+#include <string.h>
 #include <device/pci_def.h>
 #include <arch/io.h>
 #include <device/pnp_def.h>
@@ -56,9 +57,6 @@ unsigned int get_sbdn(unsigned bus);
 #include "northbridge/amd/amdk8/raminit.h"
 #include "cpu/amd/model_fxx/apic_timer.c"
 #include "lib/delay.c"
-#if CONFIG_USE_INIT == 0
-#include "lib/memcpy.c"
-#endif
 #include "cpu/x86/lapic/boot_cpu.c"
 #include "northbridge/amd/amdk8/reset_test.c"
 #include "northbridge/amd/amdk8/debug.c"
diff --git a/src/mainboard/asus/m2v-mx_se/cache_as_ram_auto.c b/src/mainboard/asus/m2v-mx_se/cache_as_ram_auto.c
index f640094711..ba3baacfd3 100644
--- a/src/mainboard/asus/m2v-mx_se/cache_as_ram_auto.c
+++ b/src/mainboard/asus/m2v-mx_se/cache_as_ram_auto.c
@@ -47,6 +47,7 @@ unsigned int get_sbdn(unsigned bus);
 /* #define DEBUG_SMBUS 1 */
 
 #include <stdint.h>
+#include <string.h>
 #include <device/pci_def.h>
 #include <arch/io.h>
 #include <device/pnp_def.h>
@@ -61,9 +62,6 @@ unsigned int get_sbdn(unsigned bus);
 #include "northbridge/amd/amdk8/raminit.h"
 #include "cpu/amd/model_fxx/apic_timer.c"
 #include "lib/delay.c"
-#if CONFIG_USE_INIT == 0
-#include "lib/memcpy.c"
-#endif
 #include "cpu/x86/lapic/boot_cpu.c"
 #include "northbridge/amd/amdk8/reset_test.c"
 #include "northbridge/amd/amdk8/debug.c"
diff --git a/src/mainboard/broadcom/blast/cache_as_ram_auto.c b/src/mainboard/broadcom/blast/cache_as_ram_auto.c
index 1ecb79d90e..2a06555b76 100644
--- a/src/mainboard/broadcom/blast/cache_as_ram_auto.c
+++ b/src/mainboard/broadcom/blast/cache_as_ram_auto.c
@@ -11,6 +11,7 @@
 #endif
  
 #include <stdint.h>
+#include <string.h>
 #include <device/pci_def.h>
 #include <arch/io.h>
 #include <device/pnp_def.h>
@@ -40,10 +41,6 @@ static void post_code(uint8_t value) {
 #include "cpu/amd/model_fxx/apic_timer.c"
 #include "lib/delay.c"
 
-#if CONFIG_USE_INIT == 0
-#include "lib/memcpy.c"
-#endif
-
 #include "cpu/x86/lapic/boot_cpu.c"
 #include "northbridge/amd/amdk8/reset_test.c"
 #include "northbridge/amd/amdk8/debug.c"
diff --git a/src/mainboard/gigabyte/ga_2761gxdk/cache_as_ram_auto.c b/src/mainboard/gigabyte/ga_2761gxdk/cache_as_ram_auto.c
index 6114aba2c4..f5c77ffee5 100644
--- a/src/mainboard/gigabyte/ga_2761gxdk/cache_as_ram_auto.c
+++ b/src/mainboard/gigabyte/ga_2761gxdk/cache_as_ram_auto.c
@@ -48,6 +48,7 @@
 #define DBGP_DEFAULT 7
 
 #include <stdint.h>
+#include <string.h>
 #include <device/pci_def.h>
 #include <device/pci_ids.h>
 #include <arch/io.h>
@@ -85,10 +86,6 @@
 
 #include "cpu/x86/bist.h"
 
-#if CONFIG_USE_INIT == 0
-        #include "lib/memcpy.c"
-#endif
-
 #include "northbridge/amd/amdk8/debug.c"
 
 #include "cpu/amd/mtrr/amd_earlymtrr.c"
diff --git a/src/mainboard/gigabyte/m57sli/cache_as_ram_auto.c b/src/mainboard/gigabyte/m57sli/cache_as_ram_auto.c
index fb52c86c24..5462c31891 100644
--- a/src/mainboard/gigabyte/m57sli/cache_as_ram_auto.c
+++ b/src/mainboard/gigabyte/m57sli/cache_as_ram_auto.c
@@ -46,6 +46,7 @@
 #define DBGP_DEFAULT 7
  
 #include <stdint.h>
+#include <string.h>
 #include <device/pci_def.h>
 #include <device/pci_ids.h>
 #include <arch/io.h>
@@ -82,10 +83,6 @@
 
 #include "cpu/x86/bist.h"
 
-#if CONFIG_USE_INIT == 0
-        #include "lib/memcpy.c"
-#endif
-
 #include "northbridge/amd/amdk8/debug.c"
 
 #include "cpu/amd/mtrr/amd_earlymtrr.c"
diff --git a/src/mainboard/hp/dl145_g3/cache_as_ram_auto.c b/src/mainboard/hp/dl145_g3/cache_as_ram_auto.c
index 9befadffd2..c2269698e8 100644
--- a/src/mainboard/hp/dl145_g3/cache_as_ram_auto.c
+++ b/src/mainboard/hp/dl145_g3/cache_as_ram_auto.c
@@ -51,6 +51,7 @@
 #define DBGP_DEFAULT 7
 
 #include <stdint.h>
+#include <string.h>
 #include <device/pci_def.h>
 #include <device/pci_ids.h>
 #include <arch/io.h>
@@ -87,10 +88,6 @@
 
 #include "cpu/x86/bist.h"
 
-#if CONFIG_USE_INIT == 0
-	#include "lib/memcpy.c"
-#endif
-
 #include "northbridge/amd/amdk8/debug.c"
 
 #include "cpu/amd/mtrr/amd_earlymtrr.c"
diff --git a/src/mainboard/ibm/e325/cache_as_ram_auto.c b/src/mainboard/ibm/e325/cache_as_ram_auto.c
index e2002afa3b..98a5a99db9 100644
--- a/src/mainboard/ibm/e325/cache_as_ram_auto.c
+++ b/src/mainboard/ibm/e325/cache_as_ram_auto.c
@@ -2,6 +2,7 @@
 #define __ROMCC__
  
 #include <stdint.h>
+#include <string.h>
 #include <device/pci_def.h>
 #include <arch/io.h>
 #include <device/pnp_def.h>
@@ -21,10 +22,6 @@
 #include "cpu/amd/model_fxx/apic_timer.c"
 #include "lib/delay.c"
 
-#if CONFIG_USE_INIT == 0
-#include "lib/memcpy.c"
-#endif
-
 #include "cpu/x86/lapic/boot_cpu.c"
 #include "northbridge/amd/amdk8/reset_test.c"
 #include "northbridge/amd/amdk8/debug.c"
diff --git a/src/mainboard/ibm/e326/cache_as_ram_auto.c b/src/mainboard/ibm/e326/cache_as_ram_auto.c
index 0c6b9b0418..872351323d 100644
--- a/src/mainboard/ibm/e326/cache_as_ram_auto.c
+++ b/src/mainboard/ibm/e326/cache_as_ram_auto.c
@@ -2,6 +2,7 @@
 #define __ROMCC__
  
 #include <stdint.h>
+#include <string.h>
 #include <device/pci_def.h>
 #include <arch/io.h>
 #include <device/pnp_def.h>
@@ -21,10 +22,6 @@
 #include "cpu/amd/model_fxx/apic_timer.c"
 #include "lib/delay.c"
 
-#if CONFIG_USE_INIT == 0
-#include "lib/memcpy.c"
-#endif
-
 #include "cpu/x86/lapic/boot_cpu.c"
 #include "northbridge/amd/amdk8/reset_test.c"
 #include "northbridge/amd/amdk8/debug.c"
diff --git a/src/mainboard/iwill/dk8_htx/cache_as_ram_auto.c b/src/mainboard/iwill/dk8_htx/cache_as_ram_auto.c
index a5cf536786..cb292bde7b 100644
--- a/src/mainboard/iwill/dk8_htx/cache_as_ram_auto.c
+++ b/src/mainboard/iwill/dk8_htx/cache_as_ram_auto.c
@@ -24,6 +24,7 @@
 #endif
 
 #include <stdint.h>
+#include <string.h>
 #include <device/pci_def.h>
 #include <device/pci_ids.h>
 #include <arch/io.h>
@@ -52,15 +53,6 @@
 
 #include "lib/delay.c"
 
-#if CONFIG_USE_INIT == 0
-	#include "lib/memcpy.c"
- // TODO: This doesn't compile at the moment. Fix later.
- // #if CONFIG_USE_PRINTK_IN_CAR == 1
- //        #include "lib/uart8250.c"
- //        #include "console/vtxprintf.c"
- //        #include "arch/i386/lib/printk_init.c"
- // #endif
-#endif
 #include "northbridge/amd/amdk8/debug.c"
 #include "cpu/amd/mtrr/amd_earlymtrr.c"
 #include "superio/winbond/w83627hf/w83627hf_early_serial.c"
diff --git a/src/mainboard/iwill/dk8s2/cache_as_ram_auto.c b/src/mainboard/iwill/dk8s2/cache_as_ram_auto.c
index 566ad419b4..6716a55825 100644
--- a/src/mainboard/iwill/dk8s2/cache_as_ram_auto.c
+++ b/src/mainboard/iwill/dk8s2/cache_as_ram_auto.c
@@ -24,6 +24,7 @@
 #endif
 
 #include <stdint.h>
+#include <string.h>
 #include <device/pci_def.h>
 #include <device/pci_ids.h>
 #include <arch/io.h>
@@ -52,15 +53,6 @@
 
 #include "lib/delay.c"
 
-#if CONFIG_USE_INIT == 0
-	#include "lib/memcpy.c"
- // TODO: This doesn't compile at the moment. Fix later.
- // #if CONFIG_USE_PRINTK_IN_CAR == 1
- //        #include "lib/uart8250.c"
- //        #include "console/vtxprintf.c"
- //        #include "arch/i386/lib/printk_init.c"
- // #endif
-#endif
 #include "northbridge/amd/amdk8/debug.c"
 #include "cpu/amd/mtrr/amd_earlymtrr.c"
 #include "superio/winbond/w83627hf/w83627hf_early_serial.c"
diff --git a/src/mainboard/iwill/dk8x/cache_as_ram_auto.c b/src/mainboard/iwill/dk8x/cache_as_ram_auto.c
index 566ad419b4..6716a55825 100644
--- a/src/mainboard/iwill/dk8x/cache_as_ram_auto.c
+++ b/src/mainboard/iwill/dk8x/cache_as_ram_auto.c
@@ -24,6 +24,7 @@
 #endif
 
 #include <stdint.h>
+#include <string.h>
 #include <device/pci_def.h>
 #include <device/pci_ids.h>
 #include <arch/io.h>
@@ -52,15 +53,6 @@
 
 #include "lib/delay.c"
 
-#if CONFIG_USE_INIT == 0
-	#include "lib/memcpy.c"
- // TODO: This doesn't compile at the moment. Fix later.
- // #if CONFIG_USE_PRINTK_IN_CAR == 1
- //        #include "lib/uart8250.c"
- //        #include "console/vtxprintf.c"
- //        #include "arch/i386/lib/printk_init.c"
- // #endif
-#endif
 #include "northbridge/amd/amdk8/debug.c"
 #include "cpu/amd/mtrr/amd_earlymtrr.c"
 #include "superio/winbond/w83627hf/w83627hf_early_serial.c"
diff --git a/src/mainboard/kontron/986lcd-m/auto.c b/src/mainboard/kontron/986lcd-m/auto.c
index 9a202d46c3..06023e67af 100644
--- a/src/mainboard/kontron/986lcd-m/auto.c
+++ b/src/mainboard/kontron/986lcd-m/auto.c
@@ -23,6 +23,7 @@
 #define __ROMCC__ 
 
 #include <stdint.h>
+#include <string.h>
 #include <arch/io.h>
 #include <arch/romcc_io.h>
 #include <device/pci_def.h>
@@ -45,10 +46,6 @@
 
 #include "northbridge/intel/i945/udelay.c"
 
-#if CONFIG_USE_INIT == 0
-#include "lib/memcpy.c"
-#endif
-
 #define SERIAL_DEV PNP_DEV(0x2e, W83627THG_SP1)
 
 #include "northbridge/intel/i945/ich7.h"
diff --git a/src/mainboard/msi/ms7135/cache_as_ram_auto.c b/src/mainboard/msi/ms7135/cache_as_ram_auto.c
index 74c5ccc014..eaeeeb16e5 100644
--- a/src/mainboard/msi/ms7135/cache_as_ram_auto.c
+++ b/src/mainboard/msi/ms7135/cache_as_ram_auto.c
@@ -38,6 +38,7 @@
 #endif
 
 #include <stdint.h>
+#include <string.h>
 #include <device/pci_def.h>
 #include <arch/io.h>
 #include <device/pnp_def.h>
@@ -56,10 +57,6 @@
 #define CK804_USE_NIC 1
 #define CK804_USE_ACI 1
 
-#if CONFIG_USE_INIT == 0
-#include "lib/memcpy.c"
-#endif
-
 #include <cpu/amd/model_fxx_rev.h>
 #include "pc80/serial.c"
 #include "arch/i386/lib/console.c"
diff --git a/src/mainboard/msi/ms7260/cache_as_ram_auto.c b/src/mainboard/msi/ms7260/cache_as_ram_auto.c
index 22b82ddedf..c9e429d5ca 100644
--- a/src/mainboard/msi/ms7260/cache_as_ram_auto.c
+++ b/src/mainboard/msi/ms7260/cache_as_ram_auto.c
@@ -50,6 +50,7 @@
 #define DBGP_DEFAULT 7
 
 #include <stdint.h>
+#include <string.h>
 #include <device/pci_def.h>
 #include <device/pci_ids.h>
 #include <arch/io.h>
@@ -84,9 +85,6 @@
 #if USE_FAILOVER_IMAGE == 0
 
 #include "cpu/x86/bist.h"
-#if CONFIG_USE_INIT == 0
-#include "lib/memcpy.c"
-#endif
 #include "northbridge/amd/amdk8/debug.c"
 #include "cpu/amd/mtrr/amd_earlymtrr.c"
 #include "northbridge/amd/amdk8/setup_resource_map.c"
diff --git a/src/mainboard/msi/ms9185/cache_as_ram_auto.c b/src/mainboard/msi/ms9185/cache_as_ram_auto.c
index 437394e24a..cd7a3d236d 100644
--- a/src/mainboard/msi/ms9185/cache_as_ram_auto.c
+++ b/src/mainboard/msi/ms9185/cache_as_ram_auto.c
@@ -47,6 +47,7 @@
 #define DEBUG_SMBUS 1
 
 #include <stdint.h>
+#include <string.h>
 #include <device/pci_def.h>
 #include <device/pci_ids.h>
 #include <arch/io.h>
@@ -75,10 +76,6 @@ static void post_code(uint8_t value) {
 #include "cpu/amd/model_fxx/apic_timer.c"
 #include "lib/delay.c"
 
-#if CONFIG_USE_INIT == 0
-       #include "lib/memcpy.c"
-#endif
-
 
 #include "cpu/x86/lapic/boot_cpu.c"
 #include "northbridge/amd/amdk8/reset_test.c"
diff --git a/src/mainboard/msi/ms9282/cache_as_ram_auto.c b/src/mainboard/msi/ms9282/cache_as_ram_auto.c
index 9754f3fc60..6e8760d4bc 100644
--- a/src/mainboard/msi/ms9282/cache_as_ram_auto.c
+++ b/src/mainboard/msi/ms9282/cache_as_ram_auto.c
@@ -41,6 +41,7 @@
 #define DEBUG_SMBUS 1
 
 #include <stdint.h>
+#include <string.h>
 #include <device/pci_def.h>
 #include <arch/io.h>
 #include <device/pnp_def.h>
@@ -57,10 +58,6 @@
 #include "cpu/amd/model_fxx/apic_timer.c"
 #include "lib/delay.c"
 
-#if CONFIG_USE_INIT == 0
-       #include "lib/memcpy.c"
-#endif
-
 #include "cpu/x86/lapic/boot_cpu.c"
 #include "northbridge/amd/amdk8/reset_test.c"
 #include "northbridge/amd/amdk8/debug.c"
diff --git a/src/mainboard/newisys/khepri/cache_as_ram_auto.c b/src/mainboard/newisys/khepri/cache_as_ram_auto.c
index 1fb2fa88ff..6adb906e33 100644
--- a/src/mainboard/newisys/khepri/cache_as_ram_auto.c
+++ b/src/mainboard/newisys/khepri/cache_as_ram_auto.c
@@ -7,6 +7,7 @@
 #define __ROMCC__
  
 #include <stdint.h>
+#include <string.h>
 #include <device/pci_def.h>
 #include <arch/io.h>
 #include <device/pnp_def.h>
@@ -37,10 +38,6 @@ static void post_code(uint8_t value) {
 #include "cpu/amd/model_fxx/apic_timer.c"
 #include "lib/delay.c"
 
-#if CONFIG_USE_INIT == 0
-#include "lib/memcpy.c"
-#endif
-
 #include "cpu/x86/lapic/boot_cpu.c"
 #include "northbridge/amd/amdk8/reset_test.c"
 #include "northbridge/amd/amdk8/debug.c"
diff --git a/src/mainboard/nvidia/l1_2pvv/cache_as_ram_auto.c b/src/mainboard/nvidia/l1_2pvv/cache_as_ram_auto.c
index 28434d3ab9..d2a357da3c 100644
--- a/src/mainboard/nvidia/l1_2pvv/cache_as_ram_auto.c
+++ b/src/mainboard/nvidia/l1_2pvv/cache_as_ram_auto.c
@@ -46,6 +46,7 @@
 #define DBGP_DEFAULT 7
 
 #include <stdint.h>
+#include <string.h>
 #include <device/pci_def.h>
 #include <device/pci_ids.h>
 #include <arch/io.h>
@@ -82,10 +83,6 @@
 
 #include "cpu/x86/bist.h"
 
-#if CONFIG_USE_INIT == 0
-	#include "lib/memcpy.c"
-#endif
-
 #include "northbridge/amd/amdk8/debug.c"
 
 #include "cpu/amd/mtrr/amd_earlymtrr.c"
diff --git a/src/mainboard/sunw/ultra40/cache_as_ram_auto.c b/src/mainboard/sunw/ultra40/cache_as_ram_auto.c
index 3c167bbcf8..bac138cf1f 100644
--- a/src/mainboard/sunw/ultra40/cache_as_ram_auto.c
+++ b/src/mainboard/sunw/ultra40/cache_as_ram_auto.c
@@ -14,6 +14,7 @@
 
  
 #include <stdint.h>
+#include <string.h>
 #include <device/pci_def.h>
 #include <arch/io.h>
 #include <device/pnp_def.h>
@@ -32,10 +33,6 @@
 #include "cpu/amd/model_fxx/apic_timer.c"
 #include "lib/delay.c"
 
-#if CONFIG_USE_INIT == 0
-#include "lib/memcpy.c"
-#endif
-
 #include "cpu/x86/lapic/boot_cpu.c"
 #include "northbridge/amd/amdk8/reset_test.c"
 #include "northbridge/amd/amdk8/debug.c"
diff --git a/src/mainboard/supermicro/h8dme/apc_auto.c b/src/mainboard/supermicro/h8dme/apc_auto.c
index 6e8f301626..099b6abd17 100644
--- a/src/mainboard/supermicro/h8dme/apc_auto.c
+++ b/src/mainboard/supermicro/h8dme/apc_auto.c
@@ -48,6 +48,9 @@
 #endif
 
 #include "arch/i386/lib/console.c"
+#include "lib/uart8250.c"
+#include "console/vtxprintf.c"
+#include "./arch/i386/lib/printk_init.c"
 
 #if 0 
 static void post_code(uint8_t value) {
diff --git a/src/mainboard/supermicro/h8dme/cache_as_ram_auto.c b/src/mainboard/supermicro/h8dme/cache_as_ram_auto.c
index ed6be2c010..a71de8428c 100644
--- a/src/mainboard/supermicro/h8dme/cache_as_ram_auto.c
+++ b/src/mainboard/supermicro/h8dme/cache_as_ram_auto.c
@@ -40,6 +40,7 @@
 #endif
 
 #include <stdint.h>
+#include <string.h>
 #include <device/pci_def.h>
 #include <device/pci_ids.h>
 #include <arch/io.h>
@@ -75,10 +76,6 @@
 
 #include "cpu/x86/bist.h"
 
-#if CONFIG_USE_INIT == 0
-#include "lib/memcpy.c"
-#endif
-
 #include "northbridge/amd/amdk8/debug.c"
 
 #include "cpu/amd/mtrr/amd_earlymtrr.c"
diff --git a/src/mainboard/supermicro/h8dmr/apc_auto.c b/src/mainboard/supermicro/h8dmr/apc_auto.c
index 6e8f301626..099b6abd17 100644
--- a/src/mainboard/supermicro/h8dmr/apc_auto.c
+++ b/src/mainboard/supermicro/h8dmr/apc_auto.c
@@ -48,6 +48,9 @@
 #endif
 
 #include "arch/i386/lib/console.c"
+#include "lib/uart8250.c"
+#include "console/vtxprintf.c"
+#include "./arch/i386/lib/printk_init.c"
 
 #if 0 
 static void post_code(uint8_t value) {
diff --git a/src/mainboard/supermicro/h8dmr/cache_as_ram_auto.c b/src/mainboard/supermicro/h8dmr/cache_as_ram_auto.c
index 43bd0b3859..c9b33877b8 100644
--- a/src/mainboard/supermicro/h8dmr/cache_as_ram_auto.c
+++ b/src/mainboard/supermicro/h8dmr/cache_as_ram_auto.c
@@ -44,6 +44,7 @@
 #endif
  
 #include <stdint.h>
+#include <string.h>
 #include <device/pci_def.h>
 #include <device/pci_ids.h>
 #include <arch/io.h>
@@ -79,10 +80,6 @@
 
 #include "cpu/x86/bist.h"
 
-#if CONFIG_USE_INIT == 0
-        #include "lib/memcpy.c"
-#endif
-
 #include "northbridge/amd/amdk8/debug.c"
 
 #include "cpu/amd/mtrr/amd_earlymtrr.c"
diff --git a/src/mainboard/technexion/tim8690/cache_as_ram_auto.c b/src/mainboard/technexion/tim8690/cache_as_ram_auto.c
index 6bb82f0bfd..503bc85495 100644
--- a/src/mainboard/technexion/tim8690/cache_as_ram_auto.c
+++ b/src/mainboard/technexion/tim8690/cache_as_ram_auto.c
@@ -37,6 +37,7 @@
 #define SMBUS_HUB 0x71
 
 #include <stdint.h>
+#include <string.h>
 #include <device/pci_def.h>
 #include <arch/io.h>
 #include <device/pnp_def.h>
@@ -54,10 +55,6 @@
 #include "cpu/amd/model_fxx/apic_timer.c"
 #include "lib/delay.c"
 
-#if CONFIG_USE_INIT == 0
-#include "lib/memcpy.c"
-#endif
-
 #include "cpu/x86/lapic/boot_cpu.c"
 #include "northbridge/amd/amdk8/reset_test.c"
 #include "northbridge/amd/amdk8/debug.c"
diff --git a/src/mainboard/tyan/s2735/cache_as_ram_auto.c b/src/mainboard/tyan/s2735/cache_as_ram_auto.c
index 797ff62b80..8c4a0370e0 100644
--- a/src/mainboard/tyan/s2735/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s2735/cache_as_ram_auto.c
@@ -2,6 +2,7 @@
 #define __ROMCC__
  
 #include <stdint.h>
+#include <string.h>
 #include <device/pci_def.h>
 #include <arch/io.h>
 #include <device/pnp_def.h>
@@ -27,10 +28,6 @@ static void post_code(uint8_t value) {
 #include "southbridge/intel/i82801er/i82801er_early_smbus.c"
 #include "northbridge/intel/e7501/raminit.h"
 
-#if CONFIG_USE_INIT == 0
-#include "lib/memcpy.c"
-#endif
-
 #include "cpu/x86/lapic/boot_cpu.c"
 #include "northbridge/intel/e7501/debug.c"
 #include "superio/winbond/w83627hf/w83627hf_early_serial.c"
@@ -259,6 +256,11 @@ cpu_reset_x:
                 print_debug("new_cpu_reset = "); print_debug_hex32(new_cpu_reset); print_debug("\r\n");
 #endif
 	
+#ifdef CONFIG_DEACTIVATE_CAR
+		print_debug("Deactivating CAR");
+#include CONFIG_DEACTIVATE_CAR_FILE
+		print_debug(" - Done.\r\n");
+#endif
 		/*copy and execute coreboot_ram */
 		copy_and_run(new_cpu_reset);
 		/* We will not return */
diff --git a/src/mainboard/tyan/s2850/cache_as_ram_auto.c b/src/mainboard/tyan/s2850/cache_as_ram_auto.c
index 318903d227..373e0a6192 100644
--- a/src/mainboard/tyan/s2850/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s2850/cache_as_ram_auto.c
@@ -2,6 +2,7 @@
 #define __ROMCC__
  
 #include <stdint.h>
+#include <string.h>
 #include <device/pci_def.h>
 #include <arch/io.h>
 #include <device/pnp_def.h>
@@ -32,10 +33,6 @@ static void post_code(uint8_t value) {
 #include "cpu/amd/model_fxx/apic_timer.c"
 #include "lib/delay.c"
 
-#if CONFIG_USE_INIT == 0
-#include "lib/memcpy.c"
-#endif
-
 #include "cpu/x86/lapic/boot_cpu.c"
 #include "northbridge/amd/amdk8/reset_test.c"
 #include "northbridge/amd/amdk8/debug.c"
diff --git a/src/mainboard/tyan/s2875/cache_as_ram_auto.c b/src/mainboard/tyan/s2875/cache_as_ram_auto.c
index 2611162714..893635b9f8 100644
--- a/src/mainboard/tyan/s2875/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s2875/cache_as_ram_auto.c
@@ -2,6 +2,7 @@
 #define __ROMCC__
  
 #include <stdint.h>
+#include <string.h>
 #include <device/pci_def.h>
 #include <arch/io.h>
 #include <device/pnp_def.h>
@@ -21,10 +22,6 @@
 #include "cpu/amd/model_fxx/apic_timer.c"
 #include "lib/delay.c"
 
-#if CONFIG_USE_INIT == 0
-#include "lib/memcpy.c"
-#endif
-
 #include "cpu/x86/lapic/boot_cpu.c"
 #include "northbridge/amd/amdk8/reset_test.c"
 #include "northbridge/amd/amdk8/debug.c"
diff --git a/src/mainboard/tyan/s2880/cache_as_ram_auto.c b/src/mainboard/tyan/s2880/cache_as_ram_auto.c
index de4b4895f8..eb4bcae466 100644
--- a/src/mainboard/tyan/s2880/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s2880/cache_as_ram_auto.c
@@ -2,6 +2,7 @@
 #define __ROMCC__
  
 #include <stdint.h>
+#include <string.h>
 #include <device/pci_def.h>
 #include <arch/io.h>
 #include <device/pnp_def.h>
@@ -22,10 +23,6 @@
 #include "cpu/amd/model_fxx/apic_timer.c"
 #include "lib/delay.c"
 
-#if CONFIG_USE_INIT == 0
-#include "lib/memcpy.c"
-#endif
-
 #include "cpu/x86/lapic/boot_cpu.c"
 #include "northbridge/amd/amdk8/reset_test.c"
 #include "northbridge/amd/amdk8/debug.c"
diff --git a/src/mainboard/tyan/s2881/cache_as_ram_auto.c b/src/mainboard/tyan/s2881/cache_as_ram_auto.c
index 1ced1c970d..0f853b8af1 100644
--- a/src/mainboard/tyan/s2881/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s2881/cache_as_ram_auto.c
@@ -8,6 +8,7 @@
 #endif
  
 #include <stdint.h>
+#include <string.h>
 #include <device/pci_def.h>
 #include <arch/io.h>
 #include <device/pnp_def.h>
@@ -38,10 +39,6 @@ static void post_code(uint8_t value) {
 #include "cpu/amd/model_fxx/apic_timer.c"
 #include "lib/delay.c"
 
-#if CONFIG_USE_INIT == 0
-#include "lib/memcpy.c"
-#endif
-
 #include "cpu/x86/lapic/boot_cpu.c"
 #include "northbridge/amd/amdk8/reset_test.c"
 #include "northbridge/amd/amdk8/debug.c"
diff --git a/src/mainboard/tyan/s2882/cache_as_ram_auto.c b/src/mainboard/tyan/s2882/cache_as_ram_auto.c
index a4b894cd0d..a249fa1a8d 100644
--- a/src/mainboard/tyan/s2882/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s2882/cache_as_ram_auto.c
@@ -2,6 +2,7 @@
 #define __ROMCC__
  
 #include <stdint.h>
+#include <string.h>
 #include <device/pci_def.h>
 #include <arch/io.h>
 #include <device/pnp_def.h>
@@ -21,10 +22,6 @@
 #include "cpu/amd/model_fxx/apic_timer.c"
 #include "lib/delay.c"
 
-#if CONFIG_USE_INIT == 0
-#include "lib/memcpy.c"
-#endif
-
 #include "cpu/x86/lapic/boot_cpu.c"
 #include "northbridge/amd/amdk8/reset_test.c"
 #include "northbridge/amd/amdk8/debug.c"
diff --git a/src/mainboard/tyan/s2885/cache_as_ram_auto.c b/src/mainboard/tyan/s2885/cache_as_ram_auto.c
index 5d43c71f9a..711afbc645 100644
--- a/src/mainboard/tyan/s2885/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s2885/cache_as_ram_auto.c
@@ -2,6 +2,7 @@
 #define __ROMCC__
  
 #include <stdint.h>
+#include <string.h>
 #include <device/pci_def.h>
 #include <arch/io.h>
 #include <device/pnp_def.h>
@@ -32,10 +33,6 @@ static void post_code(uint8_t value) {
 #include "cpu/amd/model_fxx/apic_timer.c"
 #include "lib/delay.c"
 
-#if CONFIG_USE_INIT == 0
-#include "lib/memcpy.c"
-#endif
-
 #include "cpu/x86/lapic/boot_cpu.c"
 #include "northbridge/amd/amdk8/reset_test.c"
 #include "northbridge/amd/amdk8/debug.c"
diff --git a/src/mainboard/tyan/s2891/cache_as_ram_auto.c b/src/mainboard/tyan/s2891/cache_as_ram_auto.c
index 78a2bb1ac8..6cf98abeb5 100644
--- a/src/mainboard/tyan/s2891/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s2891/cache_as_ram_auto.c
@@ -9,6 +9,7 @@
 #endif
 
 #include <stdint.h>
+#include <string.h>
 #include <device/pci_def.h>
 #include <arch/io.h>
 #include <device/pnp_def.h>
@@ -27,9 +28,6 @@
 #include "northbridge/amd/amdk8/raminit.h"
 #include "cpu/amd/model_fxx/apic_timer.c"
 #include "lib/delay.c"
-#if CONFIG_USE_INIT == 0
-#include "lib/memcpy.c"
-#endif
 #include "cpu/x86/lapic/boot_cpu.c"
 #include "northbridge/amd/amdk8/reset_test.c"
 #include "northbridge/amd/amdk8/debug.c"
diff --git a/src/mainboard/tyan/s2892/cache_as_ram_auto.c b/src/mainboard/tyan/s2892/cache_as_ram_auto.c
index f1a4bdb8a4..3147e99747 100644
--- a/src/mainboard/tyan/s2892/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s2892/cache_as_ram_auto.c
@@ -2,6 +2,7 @@
 #define __ROMCC__
 
 #include <stdint.h>
+#include <string.h>
 #include <device/pci_def.h>
 #include <arch/io.h>
 #include <device/pnp_def.h>
@@ -21,10 +22,6 @@
 #include "cpu/amd/model_fxx/apic_timer.c"
 #include "lib/delay.c"
 
-#if CONFIG_USE_INIT == 0
-#include "lib/memcpy.c"
-#endif
-
 #include "cpu/x86/lapic/boot_cpu.c"
 #include "northbridge/amd/amdk8/reset_test.c"
 #include "northbridge/amd/amdk8/debug.c"
diff --git a/src/mainboard/tyan/s2895/cache_as_ram_auto.c b/src/mainboard/tyan/s2895/cache_as_ram_auto.c
index 0dcf7cc516..4d06456d36 100644
--- a/src/mainboard/tyan/s2895/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s2895/cache_as_ram_auto.c
@@ -12,6 +12,7 @@
 #endif
 
 #include <stdint.h>
+#include <string.h>
 #include <device/pci_def.h>
 #include <arch/io.h>
 #include <device/pnp_def.h>
@@ -47,10 +48,6 @@
 
 #include "cpu/x86/bist.h"
 
-#if CONFIG_USE_INIT == 0
-#include "lib/memcpy.c"
-#endif
-
 #include "northbridge/amd/amdk8/debug.c"
 
 #include "cpu/amd/mtrr/amd_earlymtrr.c"
diff --git a/src/mainboard/tyan/s2912/cache_as_ram_auto.c b/src/mainboard/tyan/s2912/cache_as_ram_auto.c
index cd0346b31c..7c387b9bd0 100644
--- a/src/mainboard/tyan/s2912/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s2912/cache_as_ram_auto.c
@@ -46,6 +46,7 @@
 #define DBGP_DEFAULT 7
 
 #include <stdint.h>
+#include <string.h>
 #include <device/pci_def.h>
 #include <device/pci_ids.h>
 #include <arch/io.h>
@@ -82,10 +83,6 @@
 
 #include "cpu/x86/bist.h"
 
-#if CONFIG_USE_INIT == 0
-	#include "lib/memcpy.c"
-#endif
-
 #include "northbridge/amd/amdk8/debug.c"
 
 #include "cpu/amd/mtrr/amd_earlymtrr.c"
diff --git a/src/mainboard/tyan/s2912_fam10/cache_as_ram_auto.c b/src/mainboard/tyan/s2912_fam10/cache_as_ram_auto.c
index ae619e5827..8121d34bf7 100644
--- a/src/mainboard/tyan/s2912_fam10/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s2912_fam10/cache_as_ram_auto.c
@@ -39,6 +39,7 @@
 #define DBGP_DEFAULT 7
 
 #include <stdint.h>
+#include <string.h>
 #include <device/pci_def.h>
 #include <device/pci_ids.h>
 #include <arch/io.h>
@@ -78,10 +79,6 @@ static void post_code(u8 value) {
 
 #include "cpu/x86/bist.h"
 
-#if CONFIG_USE_INIT == 0
-	#include "lib/memcpy.c"
-#endif
-
 #include "northbridge/amd/amdfam10/debug.c"
 
 #include "cpu/amd/mtrr/amd_earlymtrr.c"
diff --git a/src/mainboard/tyan/s4880/cache_as_ram_auto.c b/src/mainboard/tyan/s4880/cache_as_ram_auto.c
index 2e8eb3bb48..d7226afcef 100644
--- a/src/mainboard/tyan/s4880/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s4880/cache_as_ram_auto.c
@@ -2,6 +2,7 @@
 #define __ROMCC__
  
 #include <stdint.h>
+#include <string.h>
 #include <device/pci_def.h>
 #include <arch/io.h>
 #include <device/pnp_def.h>
@@ -21,10 +22,6 @@
 #include "cpu/amd/model_fxx/apic_timer.c"
 #include "lib/delay.c"
 
-#if CONFIG_USE_INIT == 0
-#include "lib/memcpy.c"
-#endif
-
 #include "cpu/x86/lapic/boot_cpu.c"
 #include "northbridge/amd/amdk8/reset_test.c"
 #include "northbridge/amd/amdk8/debug.c"
diff --git a/src/mainboard/tyan/s4882/cache_as_ram_auto.c b/src/mainboard/tyan/s4882/cache_as_ram_auto.c
index e3b013bb55..cdc1d2645f 100644
--- a/src/mainboard/tyan/s4882/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s4882/cache_as_ram_auto.c
@@ -2,6 +2,7 @@
 #define __ROMCC__
  
 #include <stdint.h>
+#include <string.h>
 #include <device/pci_def.h>
 #include <arch/io.h>
 #include <device/pnp_def.h>
@@ -20,10 +21,6 @@
 #include "cpu/amd/model_fxx/apic_timer.c"
 #include "lib/delay.c"
 
-#if CONFIG_USE_INIT == 0
-#include "lib/memcpy.c"
-#endif
-
 #include "cpu/x86/lapic/boot_cpu.c"
 #include "northbridge/amd/amdk8/reset_test.c"
 #include "northbridge/amd/amdk8/debug.c"
diff --git a/src/mainboard/via/vt8454c/auto.c b/src/mainboard/via/vt8454c/auto.c
index 1812fca139..a77943c9e1 100644
--- a/src/mainboard/via/vt8454c/auto.c
+++ b/src/mainboard/via/vt8454c/auto.c
@@ -119,6 +119,12 @@ static void main(unsigned long bist)
 	sdram_set_registers(cx700);
 	enable_shadow_ram(cx700);
 	sdram_enable(cx700);
+
+#ifdef CONFIG_DEACTIVATE_CAR
+	print_debug("Deactivating CAR");
+#include CONFIG_DEACTIVATE_CAR_FILE
+	print_debug(" - Done.\r\n");
+#endif
 	copy_and_run(0);
 }
 
diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c
index 25ba6c25bf..8fdec9462f 100644
--- a/src/northbridge/intel/i945/raminit.c
+++ b/src/northbridge/intel/i945/raminit.c
@@ -25,8 +25,6 @@
 #include "raminit.h"
 #include "i945.h"
 
-#include "lib/memset.c"
-
 #define DEBUG_RAM_SETUP 
 
 /* Debugging macros. */
diff --git a/src/pc80/serial.c b/src/pc80/serial.c
index 45e0ce09e2..b05681dcd3 100644
--- a/src/pc80/serial.c
+++ b/src/pc80/serial.c
@@ -94,9 +94,6 @@ static void uart_init(void)
 
 #else
 /* CONFIG_USE_PRINTK_IN_CAR == 1 */
-#if CONFIG_USE_INIT == 0
-#include "../lib/uart8250.c"
-#endif
 
 extern void uart8250_init(unsigned base_port, unsigned divisor, unsigned lcs);
 static void uart_init(void)
diff --git a/src/stream/Config.lb b/src/stream/Config.lb
index 191b593b4c..89f8404f5a 100644
--- a/src/stream/Config.lb
+++ b/src/stream/Config.lb
@@ -3,7 +3,10 @@ uses CONFIG_IDE_PAYLOAD
 uses CONFIG_FS_PAYLOAD
 uses CONFIG_IDE
 uses CONFIG_SERIAL_PAYLOAD
+uses CONFIG_CBFS
 
+if CONFIG_CBFS
+else
 if CONFIG_ROM_PAYLOAD
   object rom_stream.o
 end
@@ -21,3 +24,4 @@ end
 if CONFIG_SERIAL_PAYLOAD
   object serial_stream.o
 end
+end