diff options
| author | Edward O'Callaghan <eocallaghan@alterapraxis.com> | 2014-04-29 13:59:54 +1000 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-05-02 09:44:44 +0200 |
| commit | 0dd0669c5910273bfe82cd2b0c0a41984d564631 (patch) | |
| tree | 0400ffabc8c5ce359d1b131531100404baa45b6c | |
| parent | 04f5c4eca770641ec8e7090e0f0cd41906b94b07 (diff) | |
mainboard/*: Use generic winbond romstage in place of w83627thg
Use the generic implementation of winbond in place of the model specific
w83627thg_enable_serial() as so that it maybe removed later.
Change-Id: Ice1a0dc428de9a3ddfb79e877fb03c7a8e09665f
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/5603
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
| -rw-r--r-- | src/mainboard/lanner/em8510/romstage.c | 5 | ||||
| -rw-r--r-- | src/mainboard/msi/ms7135/romstage.c | 3 | ||||
| -rw-r--r-- | src/mainboard/winent/mb6047/romstage.c | 3 |
3 files changed, 7 insertions, 4 deletions
diff --git a/src/mainboard/lanner/em8510/romstage.c b/src/mainboard/lanner/em8510/romstage.c index 335f9ecbfc..4ae5c125a6 100644 --- a/src/mainboard/lanner/em8510/romstage.c +++ b/src/mainboard/lanner/em8510/romstage.c @@ -34,6 +34,7 @@ #include "southbridge/intel/i82801dx/i82801dx.h" #include "northbridge/intel/i855/raminit.h" #include "northbridge/intel/i855/debug.c" +#include <superio/winbond/common/winbond.h> #include <superio/winbond/w83627thg/w83627thg.h> #include "cpu/x86/bist.h" @@ -56,8 +57,8 @@ void main(unsigned long bist) #endif } - w83627thg_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); - console_init(); + winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); + console_init(); /* Halt if there was a built in self test failure */ report_bist_failure(bist); diff --git a/src/mainboard/msi/ms7135/romstage.c b/src/mainboard/msi/ms7135/romstage.c index ccb420a259..15c02f595c 100644 --- a/src/mainboard/msi/ms7135/romstage.c +++ b/src/mainboard/msi/ms7135/romstage.c @@ -31,6 +31,7 @@ #include <pc80/mc146818rtc.h> #include "cpu/x86/lapic.h" #include "northbridge/amd/amdk8/reset_test.c" +#include <superio/winbond/common/winbond.h> #include <superio/winbond/w83627thg/w83627thg.h> #include <cpu/amd/model_fxx_rev.h> #include <console/console.h> @@ -127,7 +128,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) if (bist == 0) bsp_apicid = init_cpus(cpu_init_detectedx); - w83627thg_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); + winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); console_init(); /* Halt if there was a built in self test failure */ diff --git a/src/mainboard/winent/mb6047/romstage.c b/src/mainboard/winent/mb6047/romstage.c index 07f235c8a1..a725beba83 100644 --- a/src/mainboard/winent/mb6047/romstage.c +++ b/src/mainboard/winent/mb6047/romstage.c @@ -16,6 +16,7 @@ #include "cpu/x86/lapic.h" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" +#include <superio/winbond/common/winbond.h> #include <superio/winbond/w83627thg/w83627thg.h> #include "cpu/x86/bist.h" #include "northbridge/amd/amdk8/setup_resource_map.c" @@ -84,7 +85,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) // post_code(0x32); - w83627thg_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); + winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); console_init(); /* Halt if there was a built in self test failure */ |