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authorStefan Reinauer <reinauer@chromium.org>2012-10-15 13:47:04 -0700
committerRonald G. Minnich <rminnich@gmail.com>2012-11-12 17:11:08 +0100
commit08067ba9cbf9904f6637775fe64c8b43229896b6 (patch)
tree6e0704660e4d697a71bc94b8cf5cc9f5a3c0d1fb
parentbdc64c6e94bef2efbf4ec7239d1bfafc66dd8ec7 (diff)
ivybridge: Catch unknown CPU revisions
Adding an entry for 0x306a0 will make sure that all CPUs with CPUIDs 0x306aX will execute the driver (analog to Sandybridge behavior) Change-Id: I0353f3a48ecfd41274fdf6ee302c7d34482f1b5b Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/1783 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
-rw-r--r--src/cpu/intel/model_206ax/model_206ax_init.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/cpu/intel/model_206ax/model_206ax_init.c b/src/cpu/intel/model_206ax/model_206ax_init.c
index bcd68657e0..f34c589852 100644
--- a/src/cpu/intel/model_206ax/model_206ax_init.c
+++ b/src/cpu/intel/model_206ax/model_206ax_init.c
@@ -599,6 +599,7 @@ static struct cpu_device_id cpu_table[] = {
{ X86_VENDOR_INTEL, 0x206a0 }, /* Intel Sandybridge */
{ X86_VENDOR_INTEL, 0x206a6 }, /* Intel Sandybridge D1 */
{ X86_VENDOR_INTEL, 0x206a7 }, /* Intel Sandybridge D2/J1 */
+ { X86_VENDOR_INTEL, 0x306a0 }, /* Intel IvyBridge */
{ X86_VENDOR_INTEL, 0x306a2 }, /* Intel IvyBridge */
{ X86_VENDOR_INTEL, 0x306a4 }, /* Intel IvyBridge */
{ X86_VENDOR_INTEL, 0x306a5 }, /* Intel IvyBridge */