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authorVladimir Serbinenko <phcoder@gmail.com>2015-05-18 10:31:35 +0200
committerVladimir Serbinenko <phcoder@gmail.com>2015-05-27 22:23:38 +0200
commited54cc707b77385af69c1854d64447078a0ddc9a (patch)
tree28a4cc80e4f2c8c124dd512226c13e41dca6ef26
parent0e90dae584c506b06e7bf3d89064a64db04132bb (diff)
sandybridge native: Add call to TPM code.
This allows to deactivate TPM on boards using native sandy/ivy init. Change-Id: I9455179c7b51097a3a9554c16a407365fbc65e6f Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/10272 Tested-by: build bot (Jenkins) Reviewed-by: Philipp Deppenwiese <zaolin@das-labor.org>
-rw-r--r--src/northbridge/intel/sandybridge/romstage_native.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/northbridge/intel/sandybridge/romstage_native.c b/src/northbridge/intel/sandybridge/romstage_native.c
index 657ceb87ad..45f671c6e5 100644
--- a/src/northbridge/intel/sandybridge/romstage_native.c
+++ b/src/northbridge/intel/sandybridge/romstage_native.c
@@ -32,6 +32,7 @@
#include <device/pci_def.h>
#include <device/device.h>
#include <halt.h>
+#include <tpm.h>
#include "raminit_native.h"
#include <northbridge/intel/sandybridge/chip.h>
#include "southbridge/intel/bd82x6x/pch.h"
@@ -129,6 +130,10 @@ void main(unsigned long bist)
northbridge_romstage_finalize(s3resume);
+#if CONFIG_LPC_TPM
+ init_tpm(s3resume);
+#endif
+
post_code(0x3f);
timestamp_add_now(TS_END_ROMSTAGE);
}