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authorEdward O'Callaghan <quasisec@google.com>2019-12-15 23:29:49 +1100
committerEdward O'Callaghan <quasisec@chromium.org>2019-12-20 06:45:51 +0000
commitd4823664a895546ac699cc70e41a94f943b364f8 (patch)
treeca941eb036dc8a23fdb509f24dd1b06b84bdb7c4
parent8f454fd2ea86edf2a0646d28a1451116c3de7a9a (diff)
mainboard/google/puff: Clean up dt for pci 15.2
Seems nothing special is needed here from coreboot. V.2: Fix typo as well in speed map. BRANCH=none BUG=b:143047058 TEST=./util/abuild/abuild -p none -t google/hatch -x -a Change-Id: Ief750f98677b2017af78fb0b5bc98e1492dedbe4 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37736 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
-rw-r--r--src/mainboard/google/hatch/variants/puff/overridetree.cb13
1 files changed, 2 insertions, 11 deletions
diff --git a/src/mainboard/google/hatch/variants/puff/overridetree.cb b/src/mainboard/google/hatch/variants/puff/overridetree.cb
index 384bb9a6d0..ca6c818128 100644
--- a/src/mainboard/google/hatch/variants/puff/overridetree.cb
+++ b/src/mainboard/google/hatch/variants/puff/overridetree.cb
@@ -86,7 +86,7 @@ chip soc/intel/cannonlake
.rise_time_ns = 0,
.fall_time_ns = 0,
},
- .i2c[1] = {
+ .i2c[2] = {
.speed = I2C_SPEED_FAST,
.rise_time_ns = 0,
.fall_time_ns = 0,
@@ -111,16 +111,7 @@ chip soc/intel/cannonlake
# RFU - Reserved for Future Use.
end # I2C #0
device pci 15.1 off end # I2C #1
- device pci 15.2 on
-# chip drivers/i2c/generic
-# register "name" = ""PS175""
-# register "desc" = ""PCON PS175""
-# register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C10)"
-# register "stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C11)"
-# register "has_power_resource" = "1"
-# device i2c 15 on end
-# end
- end # I2C #2
+ device pci 15.2 on end # I2C #2, PCON PS175.
device pci 15.3 on
# chip drivers/i2c/generic
# register "name" = ""RTD21""