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authorElyes HAOUAS <ehaouas@noos.fr>2018-10-27 09:41:02 +0200
committerPatrick Georgi <pgeorgi@google.com>2018-11-12 09:22:18 +0000
commitd2b9ec13622d34714b4ecf8b9daf53b32665d3d7 (patch)
tree205a6f66c9ece4b05010b0c33a8c174bc954249c
parenta9a1913d4d3f27f681b6ef980f064b57da8c1a68 (diff)
src: Remove unneeded include "{arch,cpu}/cpu.h"
Change-Id: I17c4fc4e3e2eeef7c720c6a020b37d8f7a0f57a4 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/29300 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
-rw-r--r--src/arch/x86/acpi_s3.c2
-rw-r--r--src/arch/x86/mpspec.c1
-rw-r--r--src/arch/x86/tables.c1
-rw-r--r--src/cpu/allwinner/a10/cpu.c2
-rw-r--r--src/cpu/amd/car/disable_cache_as_ram.c1
-rw-r--r--src/cpu/amd/family_10h-family_15h/init_cpus.h1
-rw-r--r--src/cpu/amd/family_10h-family_15h/processor_name.c1
-rw-r--r--src/cpu/amd/family_10h-family_15h/ram_calc.c2
-rw-r--r--src/cpu/amd/quadcore/amd_sibling.c2
-rw-r--r--src/cpu/amd/quadcore/quadcore.c1
-rw-r--r--src/cpu/amd/smm/smm_init.c1
-rw-r--r--src/cpu/intel/car/romstage.c1
-rw-r--r--src/cpu/intel/fsp_model_206ax/finalize.c2
-rw-r--r--src/cpu/intel/fsp_model_406dx/bootblock.c1
-rw-r--r--src/cpu/intel/haswell/bootblock.c1
-rw-r--r--src/cpu/intel/haswell/finalize.c2
-rw-r--r--src/cpu/intel/haswell/romstage.c1
-rw-r--r--src/cpu/intel/haswell/smmrelocate.c1
-rw-r--r--src/cpu/intel/hyperthreading/intel_sibling.c1
-rw-r--r--src/cpu/intel/microcode/microcode.c2
-rw-r--r--src/cpu/intel/model_2065x/finalize.c2
-rw-r--r--src/cpu/intel/model_206ax/finalize.c2
-rw-r--r--src/cpu/intel/slot_1/l2_cache.c1
-rw-r--r--src/cpu/intel/smm/gen1/smmrelocate.c1
-rw-r--r--src/cpu/via/nano/update_ucode.c1
-rw-r--r--src/cpu/x86/mtrr/mtrr.c1
-rw-r--r--src/cpu/x86/name/name.c2
-rw-r--r--src/cpu/x86/pae/pgtbl.c1
-rw-r--r--src/drivers/amd/agesa/state_machine.c1
-rw-r--r--src/drivers/gic/gic.c1
-rw-r--r--src/drivers/i2c/w83793/w83793.c1
-rw-r--r--src/drivers/intel/fsp1_1/stack.c1
-rw-r--r--src/drivers/intel/fsp2_0/memory_init.c1
-rw-r--r--src/drivers/intel/fsp2_0/notify.c1
-rw-r--r--src/drivers/intel/fsp2_0/silicon_init.c1
-rw-r--r--src/drivers/intel/fsp2_0/upd_display.c1
-rw-r--r--src/include/cpu/amd/model_10xxx_rev.h2
-rw-r--r--src/include/cpu/x86/cr.h1
-rw-r--r--src/mainboard/adi/rcc-dff/romstage.c1
-rw-r--r--src/mainboard/advansus/a785e-i/romstage.c1
-rw-r--r--src/mainboard/amd/bettong/mptable.c1
-rw-r--r--src/mainboard/amd/bettong/romstage.c1
-rw-r--r--src/mainboard/amd/bimini_fam10/romstage.c1
-rw-r--r--src/mainboard/amd/db-ft3b-lc/mptable.c1
-rw-r--r--src/mainboard/amd/gardenia/mptable.c1
-rw-r--r--src/mainboard/amd/lamar/mptable.c1
-rw-r--r--src/mainboard/amd/mahogany_fam10/romstage.c1
-rw-r--r--src/mainboard/amd/olivehill/mptable.c1
-rw-r--r--src/mainboard/amd/olivehillplus/mptable.c1
-rw-r--r--src/mainboard/amd/parmer/mptable.c1
-rw-r--r--src/mainboard/amd/parmer/romstage.c1
-rw-r--r--src/mainboard/amd/serengeti_cheetah_fam10/romstage.c1
-rw-r--r--src/mainboard/amd/thatcher/mptable.c1
-rw-r--r--src/mainboard/amd/thatcher/romstage.c1
-rw-r--r--src/mainboard/amd/tilapia_fam10/romstage.c1
-rw-r--r--src/mainboard/aopen/dxplplusu/romstage.c1
-rw-r--r--src/mainboard/asrock/imb-a180/mptable.c1
-rw-r--r--src/mainboard/asus/am1i-a/mptable.c1
-rw-r--r--src/mainboard/asus/f2a85-m/mptable.c2
-rw-r--r--src/mainboard/asus/kcma-d8/resourcemap.c2
-rw-r--r--src/mainboard/asus/kcma-d8/romstage.c1
-rw-r--r--src/mainboard/asus/kfsn4-dre/romstage.c1
-rw-r--r--src/mainboard/asus/kgpe-d16/resourcemap.c2
-rw-r--r--src/mainboard/asus/kgpe-d16/romstage.c1
-rw-r--r--src/mainboard/asus/m4a78-em/romstage.c1
-rw-r--r--src/mainboard/asus/m4a785-m/romstage.c1
-rw-r--r--src/mainboard/asus/m5a88-v/romstage.c1
-rw-r--r--src/mainboard/avalue/eax-785e/romstage.c1
-rw-r--r--src/mainboard/bap/ode_e20XX/mptable.c1
-rw-r--r--src/mainboard/bap/ode_e21XX/mptable.c1
-rw-r--r--src/mainboard/biostar/a68n_5200/mptable.c1
-rw-r--r--src/mainboard/biostar/am1ml/mptable.c1
-rw-r--r--src/mainboard/gigabyte/ma785gm/romstage.c1
-rw-r--r--src/mainboard/gigabyte/ma785gmt/romstage.c1
-rw-r--r--src/mainboard/gigabyte/ma78gm/romstage.c1
-rw-r--r--src/mainboard/gizmosphere/gizmo2/mptable.c1
-rw-r--r--src/mainboard/google/butterfly/romstage.c1
-rw-r--r--src/mainboard/google/kahlee/mptable.c1
-rw-r--r--src/mainboard/google/link/romstage.c1
-rw-r--r--src/mainboard/google/nyan/romstage.c1
-rw-r--r--src/mainboard/google/nyan_big/romstage.c1
-rw-r--r--src/mainboard/google/nyan_blaze/romstage.c1
-rw-r--r--src/mainboard/google/parrot/romstage.c1
-rw-r--r--src/mainboard/google/stout/romstage.c1
-rw-r--r--src/mainboard/hp/abm/mptable.c2
-rw-r--r--src/mainboard/hp/dl165_g6_fam10/romstage.c1
-rw-r--r--src/mainboard/hp/pavilion_m6_1035dx/mptable.c2
-rw-r--r--src/mainboard/iei/kino-780am2-fam10/romstage.c1
-rw-r--r--src/mainboard/intel/bayleybay_fsp/romstage.c1
-rw-r--r--src/mainboard/intel/cougar_canyon2/romstage.c2
-rw-r--r--src/mainboard/intel/emeraldlake2/romstage.c1
-rw-r--r--src/mainboard/intel/harcuvar/acpi_tables.c1
-rw-r--r--src/mainboard/intel/littleplains/romstage.c1
-rw-r--r--src/mainboard/intel/mohonpeak/romstage.c1
-rw-r--r--src/mainboard/intel/stargo2/romstage.c1
-rw-r--r--src/mainboard/jetway/pa78vm5/romstage.c1
-rw-r--r--src/mainboard/kontron/ktqm77/romstage.c1
-rw-r--r--src/mainboard/lenovo/g505s/mptable.c2
-rw-r--r--src/mainboard/lenovo/t520/romstage.c2
-rw-r--r--src/mainboard/lenovo/x1_carbon_gen1/romstage.c1
-rw-r--r--src/mainboard/lenovo/x220/romstage.c1
-rw-r--r--src/mainboard/lenovo/x230/romstage.c2
-rw-r--r--src/mainboard/msi/ms7721/mptable.c2
-rw-r--r--src/mainboard/msi/ms9652_fam10/romstage.c1
-rw-r--r--src/mainboard/samsung/lumpy/romstage.c1
-rw-r--r--src/mainboard/samsung/stumpy/romstage.c1
-rw-r--r--src/mainboard/scaleway/tagada/acpi_tables.c1
-rw-r--r--src/mainboard/siemens/mc_tcu3/romstage.c1
-rw-r--r--src/mainboard/supermicro/h8dmr_fam10/romstage.c1
-rw-r--r--src/mainboard/supermicro/h8qme_fam10/romstage.c1
-rw-r--r--src/mainboard/supermicro/h8scm_fam10/romstage.c1
-rw-r--r--src/mainboard/tyan/s2912_fam10/romstage.c1
-rw-r--r--src/northbridge/amd/amdfam10/raminit_amdmct.c1
-rw-r--r--src/northbridge/amd/amdht/h3finit.c2
-rw-r--r--src/northbridge/amd/amdht/h3ncmn.c2
-rw-r--r--src/northbridge/amd/amdht/ht_wrapper.c1
-rw-r--r--src/northbridge/amd/amdmct/mct_ddr3/mctardk5.c1
-rw-r--r--src/northbridge/amd/amdmct/mct_ddr3/mctdqs_d.c1
-rw-r--r--src/northbridge/amd/amdmct/mct_ddr3/mctecc_d.c1
-rw-r--r--src/northbridge/amd/amdmct/mct_ddr3/mcthwl.c1
-rw-r--r--src/northbridge/amd/amdmct/mct_ddr3/mctrci.c1
-rw-r--r--src/northbridge/amd/amdmct/mct_ddr3/mctsdi.c1
-rw-r--r--src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c1
-rw-r--r--src/northbridge/amd/amdmct/mct_ddr3/mctsrc1p.c1
-rw-r--r--src/northbridge/amd/amdmct/mct_ddr3/mctwl.c1
-rw-r--r--src/northbridge/amd/amdmct/mct_ddr3/mutilc_d.c2
-rw-r--r--src/northbridge/amd/amdmct/wrappers/mcti_d.c2
-rw-r--r--src/northbridge/intel/e7505/raminit.c1
-rw-r--r--src/northbridge/intel/gm45/acpi.c1
-rw-r--r--src/northbridge/intel/haswell/northbridge.c1
-rw-r--r--src/northbridge/intel/i945/acpi.c1
-rw-r--r--src/northbridge/intel/nehalem/raminit.c1
-rw-r--r--src/northbridge/intel/x4x/acpi.c1
-rw-r--r--src/northbridge/intel/x4x/raminit.c1
-rw-r--r--src/northbridge/intel/x4x/raminit_ddr23.c1
-rw-r--r--src/soc/amd/stoneyridge/chip.c1
-rw-r--r--src/soc/amd/stoneyridge/northbridge.c1
-rw-r--r--src/soc/amd/stoneyridge/smi.c1
-rw-r--r--src/soc/cavium/cn81xx/soc.c1
-rw-r--r--src/soc/intel/apollolake/acpi.c1
-rw-r--r--src/soc/intel/apollolake/bootblock/bootblock.c2
-rw-r--r--src/soc/intel/apollolake/car.c1
-rw-r--r--src/soc/intel/apollolake/chip.c1
-rw-r--r--src/soc/intel/apollolake/include/soc/romstage.h1
-rw-r--r--src/soc/intel/baytrail/acpi.c1
-rw-r--r--src/soc/intel/baytrail/placeholders.c1
-rw-r--r--src/soc/intel/baytrail/smm.c1
-rw-r--r--src/soc/intel/baytrail/southcluster.c2
-rw-r--r--src/soc/intel/braswell/acpi.c1
-rw-r--r--src/soc/intel/braswell/include/soc/romstage.h1
-rw-r--r--src/soc/intel/braswell/placeholders.c1
-rw-r--r--src/soc/intel/braswell/romstage/romstage.c1
-rw-r--r--src/soc/intel/braswell/smm.c1
-rw-r--r--src/soc/intel/broadwell/bootblock/cpu.c1
-rw-r--r--src/soc/intel/broadwell/cpu_info.c2
-rw-r--r--src/soc/intel/broadwell/include/soc/cpu.h1
-rw-r--r--src/soc/intel/broadwell/lpc.c1
-rw-r--r--src/soc/intel/broadwell/romstage/romstage.c1
-rw-r--r--src/soc/intel/broadwell/smi.c1
-rw-r--r--src/soc/intel/broadwell/smmrelocate.c1
-rw-r--r--src/soc/intel/cannonlake/acpi.c2
-rw-r--r--src/soc/intel/cannonlake/include/soc/cpu.h1
-rw-r--r--src/soc/intel/cannonlake/include/soc/romstage.h1
-rw-r--r--src/soc/intel/common/block/cpu/cpulib.c1
-rw-r--r--src/soc/intel/common/util.c1
-rw-r--r--src/soc/intel/denverton_ns/acpi.c2
-rw-r--r--src/soc/intel/denverton_ns/bootblock/bootblock.c1
-rw-r--r--src/soc/intel/denverton_ns/chip.c1
-rw-r--r--src/soc/intel/denverton_ns/include/soc/romstage.h1
-rw-r--r--src/soc/intel/denverton_ns/lpc.c1
-rw-r--r--src/soc/intel/denverton_ns/smm.c1
-rw-r--r--src/soc/intel/denverton_ns/tsc_freq.c1
-rw-r--r--src/soc/intel/denverton_ns/upd_display.c1
-rw-r--r--src/soc/intel/fsp_baytrail/acpi.c1
-rw-r--r--src/soc/intel/fsp_baytrail/include/soc/romstage.h1
-rw-r--r--src/soc/intel/fsp_baytrail/placeholders.c1
-rw-r--r--src/soc/intel/fsp_baytrail/romstage/romstage.c1
-rw-r--r--src/soc/intel/fsp_baytrail/smm.c1
-rw-r--r--src/soc/intel/fsp_baytrail/southcluster.c1
-rw-r--r--src/soc/intel/fsp_broadwell_de/acpi.c1
-rw-r--r--src/soc/intel/fsp_broadwell_de/include/soc/romstage.h1
-rw-r--r--src/soc/intel/fsp_broadwell_de/romstage/romstage.c1
-rw-r--r--src/soc/intel/fsp_broadwell_de/smmrelocate.c1
-rw-r--r--src/soc/intel/icelake/acpi.c2
-rw-r--r--src/soc/intel/icelake/include/soc/cpu.h1
-rw-r--r--src/soc/intel/icelake/include/soc/romstage.h1
-rw-r--r--src/soc/intel/quark/include/soc/cpu.h1
-rw-r--r--src/soc/intel/skylake/acpi.c1
-rw-r--r--src/soc/intel/skylake/cpu.c1
-rw-r--r--src/soc/intel/skylake/include/fsp20/soc/romstage.h1
-rw-r--r--src/soc/intel/skylake/include/soc/cpu.h1
-rw-r--r--src/soc/intel/skylake/romstage/romstage.c1
-rw-r--r--src/soc/intel/skylake/smmrelocate.c1
-rw-r--r--src/soc/mediatek/mt8173/soc.c1
-rw-r--r--src/soc/nvidia/tegra124/display.c1
-rw-r--r--src/soc/nvidia/tegra210/ramstage.c1
-rw-r--r--src/soc/nvidia/tegra210/soc.c1
-rw-r--r--src/soc/nvidia/tegra210/sor.c1
-rw-r--r--src/soc/rockchip/rk3399/soc.c1
-rw-r--r--src/southbridge/amd/agesa/hudson/early_setup.c1
-rw-r--r--src/southbridge/amd/agesa/hudson/smi.c1
-rw-r--r--src/southbridge/amd/pi/hudson/early_setup.c1
-rw-r--r--src/southbridge/amd/pi/hudson/smi.c1
-rw-r--r--src/southbridge/amd/rs780/cmn.c4
-rw-r--r--src/southbridge/amd/sb700/early_setup.c1
-rw-r--r--src/southbridge/amd/sb800/early_setup.c1
-rw-r--r--src/southbridge/intel/bd82x6x/lpc.c2
-rw-r--r--src/southbridge/intel/common/smi.c1
-rw-r--r--src/southbridge/intel/fsp_bd82x6x/lpc.c2
-rw-r--r--src/southbridge/intel/fsp_bd82x6x/smi.c1
-rw-r--r--src/southbridge/intel/fsp_i89xx/lpc.c2
-rw-r--r--src/southbridge/intel/fsp_i89xx/romstage.c1
-rw-r--r--src/southbridge/intel/fsp_i89xx/romstage.h1
-rw-r--r--src/southbridge/intel/fsp_i89xx/smi.c1
-rw-r--r--src/southbridge/intel/fsp_rangeley/lpc.c2
-rw-r--r--src/southbridge/intel/fsp_rangeley/romstage.c1
-rw-r--r--src/southbridge/intel/fsp_rangeley/romstage.h1
-rw-r--r--src/southbridge/intel/i82801dx/smi.c1
-rw-r--r--src/southbridge/intel/i82801gx/lpc.c1
-rw-r--r--src/southbridge/intel/i82801gx/smi.c1
-rw-r--r--src/southbridge/intel/i82801ix/lpc.c1
-rw-r--r--src/southbridge/intel/i82801ix/smi.c1
-rw-r--r--src/southbridge/intel/i82801jx/lpc.c1
-rw-r--r--src/southbridge/intel/i82801jx/smi.c1
-rw-r--r--src/southbridge/intel/ibexpeak/lpc.c2
-rw-r--r--src/southbridge/intel/ibexpeak/smi.c1
-rw-r--r--src/southbridge/intel/lynxpoint/lpc.c2
-rw-r--r--src/southbridge/intel/lynxpoint/smi.c1
228 files changed, 71 insertions, 197 deletions
diff --git a/src/arch/x86/acpi_s3.c b/src/arch/x86/acpi_s3.c
index 71267f033b..ad9fe0066b 100644
--- a/src/arch/x86/acpi_s3.c
+++ b/src/arch/x86/acpi_s3.c
@@ -16,8 +16,8 @@
#include <console/console.h>
#include <string.h>
#include <arch/acpi.h>
+#include <arch/cpu.h>
#include <cbmem.h>
-#include <cpu/cpu.h>
#include <fallback.h>
#include <timestamp.h>
#include <program_loading.h>
diff --git a/src/arch/x86/mpspec.c b/src/arch/x86/mpspec.c
index 8dd902e1d7..b44662d38b 100644
--- a/src/arch/x86/mpspec.c
+++ b/src/arch/x86/mpspec.c
@@ -16,7 +16,6 @@
#include <console/console.h>
#include <device/path.h>
#include <device/pci_ids.h>
-#include <cpu/cpu.h>
#include <arch/smp/mpspec.h>
#include <string.h>
#include <arch/cpu.h>
diff --git a/src/arch/x86/tables.c b/src/arch/x86/tables.c
index 0bab4234c9..5319c690f2 100644
--- a/src/arch/x86/tables.c
+++ b/src/arch/x86/tables.c
@@ -16,7 +16,6 @@
*/
#include <console/console.h>
-#include <cpu/cpu.h>
#include <bootmem.h>
#include <bootstate.h>
#include <boot/tables.h>
diff --git a/src/cpu/allwinner/a10/cpu.c b/src/cpu/allwinner/a10/cpu.c
index 60b93be7d3..b3ebe78bd3 100644
--- a/src/cpu/allwinner/a10/cpu.c
+++ b/src/cpu/allwinner/a10/cpu.c
@@ -19,11 +19,9 @@
#include <console/console.h>
#include <device/device.h>
-#include <cpu/cpu.h>
#include <cbmem.h>
#include <symbols.h>
-
static void cpu_enable_resources(struct device *dev)
{
ram_resource(dev, 0, (uintptr_t)_dram/KiB,
diff --git a/src/cpu/amd/car/disable_cache_as_ram.c b/src/cpu/amd/car/disable_cache_as_ram.c
index 5eda660775..b1d0c5a1e1 100644
--- a/src/cpu/amd/car/disable_cache_as_ram.c
+++ b/src/cpu/amd/car/disable_cache_as_ram.c
@@ -19,6 +19,7 @@
* WARNING: this file will be used by both any AP cores and core 0 / node 0
*/
+#include <arch/cpu.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/msr.h>
#include <cpu/amd/msr.h>
diff --git a/src/cpu/amd/family_10h-family_15h/init_cpus.h b/src/cpu/amd/family_10h-family_15h/init_cpus.h
index d4bff0b3f2..65649d6845 100644
--- a/src/cpu/amd/family_10h-family_15h/init_cpus.h
+++ b/src/cpu/amd/family_10h-family_15h/init_cpus.h
@@ -18,7 +18,6 @@
#include <stdlib.h>
#include <console/console.h>
-#include <arch/cpu.h>
#include <cpu/x86/lapic.h>
#include <cpu/x86/mtrr.h>
#include <cpu/amd/msr.h>
diff --git a/src/cpu/amd/family_10h-family_15h/processor_name.c b/src/cpu/amd/family_10h-family_15h/processor_name.c
index 72311035ac..478f0a510f 100644
--- a/src/cpu/amd/family_10h-family_15h/processor_name.c
+++ b/src/cpu/amd/family_10h-family_15h/processor_name.c
@@ -27,7 +27,6 @@
#include <string.h>
#include <cpu/x86/msr.h>
#include <cpu/amd/mtrr.h>
-#include <cpu/cpu.h>
#include <cpu/amd/model_10xxx_rev.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/cpu/amd/family_10h-family_15h/ram_calc.c b/src/cpu/amd/family_10h-family_15h/ram_calc.c
index 54fdaf5d7e..ab2cafdcda 100644
--- a/src/cpu/amd/family_10h-family_15h/ram_calc.c
+++ b/src/cpu/amd/family_10h-family_15h/ram_calc.c
@@ -14,7 +14,7 @@
* GNU General Public License for more details.
*/
-#include <cpu/cpu.h>
+#include <arch/cpu.h>
#include <cpu/x86/msr.h>
#include <cpu/amd/mtrr.h>
diff --git a/src/cpu/amd/quadcore/amd_sibling.c b/src/cpu/amd/quadcore/amd_sibling.c
index 32b1784c78..f9259c2745 100644
--- a/src/cpu/amd/quadcore/amd_sibling.c
+++ b/src/cpu/amd/quadcore/amd_sibling.c
@@ -13,9 +13,7 @@
* GNU General Public License for more details.
*/
-
#include <console/console.h>
-#include <cpu/cpu.h>
#include <cpu/x86/lapic.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/cpu/amd/quadcore/quadcore.c b/src/cpu/amd/quadcore/quadcore.c
index 63b1384c40..c2d277ad3f 100644
--- a/src/cpu/amd/quadcore/quadcore.c
+++ b/src/cpu/amd/quadcore/quadcore.c
@@ -15,6 +15,7 @@
* GNU General Public License for more details.
*/
+#include <arch/cpu.h>
#include <console/console.h>
#include <pc80/mc146818rtc.h>
#if IS_ENABLED(CONFIG_HAVE_OPTION_TABLE)
diff --git a/src/cpu/amd/smm/smm_init.c b/src/cpu/amd/smm/smm_init.c
index 7af8808c62..9e7832e78f 100644
--- a/src/cpu/amd/smm/smm_init.c
+++ b/src/cpu/amd/smm/smm_init.c
@@ -16,7 +16,6 @@
#include <console/console.h>
#include <arch/io.h>
-#include <cpu/cpu.h>
#include <cpu/x86/lapic.h>
#include <cpu/x86/msr.h>
#include <cpu/x86/mtrr.h>
diff --git a/src/cpu/intel/car/romstage.c b/src/cpu/intel/car/romstage.c
index c36e0468e7..164f1219a1 100644
--- a/src/cpu/intel/car/romstage.c
+++ b/src/cpu/intel/car/romstage.c
@@ -11,7 +11,6 @@
* GNU General Public License for more details.
*/
-#include <arch/cpu.h>
#include <console/console.h>
#include <cpu/intel/romstage.h>
#include <cpu/x86/mtrr.h>
diff --git a/src/cpu/intel/fsp_model_206ax/finalize.c b/src/cpu/intel/fsp_model_206ax/finalize.c
index d143497e2e..8655402599 100644
--- a/src/cpu/intel/fsp_model_206ax/finalize.c
+++ b/src/cpu/intel/fsp_model_206ax/finalize.c
@@ -16,7 +16,7 @@
#include <stdint.h>
#include <stdlib.h>
-#include <cpu/cpu.h>
+#include <arch/cpu.h>
#include <cpu/x86/msr.h>
#include "model_206ax.h"
diff --git a/src/cpu/intel/fsp_model_406dx/bootblock.c b/src/cpu/intel/fsp_model_406dx/bootblock.c
index 327c4a4ce9..13c5d0f767 100644
--- a/src/cpu/intel/fsp_model_406dx/bootblock.c
+++ b/src/cpu/intel/fsp_model_406dx/bootblock.c
@@ -15,7 +15,6 @@
*/
#include <stdint.h>
-#include <arch/cpu.h>
#include <cpu/x86/cache.h>
#include <cpu/intel/microcode/microcode.c>
#include <cpu/x86/msr.h>
diff --git a/src/cpu/intel/haswell/bootblock.c b/src/cpu/intel/haswell/bootblock.c
index 57e1bbb30f..3a306b5729 100644
--- a/src/cpu/intel/haswell/bootblock.c
+++ b/src/cpu/intel/haswell/bootblock.c
@@ -14,7 +14,6 @@
*/
#include <stdint.h>
-#include <arch/cpu.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/msr.h>
#include <cpu/x86/mtrr.h>
diff --git a/src/cpu/intel/haswell/finalize.c b/src/cpu/intel/haswell/finalize.c
index b170215ed3..cc2d1a4c36 100644
--- a/src/cpu/intel/haswell/finalize.c
+++ b/src/cpu/intel/haswell/finalize.c
@@ -16,7 +16,7 @@
#include <stdint.h>
#include <stdlib.h>
-#include <cpu/cpu.h>
+#include <arch/cpu.h>
#include <cpu/x86/msr.h>
#include "haswell.h"
diff --git a/src/cpu/intel/haswell/romstage.c b/src/cpu/intel/haswell/romstage.c
index 8c65dae237..7e4efa735c 100644
--- a/src/cpu/intel/haswell/romstage.c
+++ b/src/cpu/intel/haswell/romstage.c
@@ -19,7 +19,6 @@
#include <console/console.h>
#include <arch/cpu.h>
#include <cf9_reset.h>
-#include <cpu/cpu.h>
#include <cpu/x86/bist.h>
#include <cpu/x86/msr.h>
#include <cpu/x86/mtrr.h>
diff --git a/src/cpu/intel/haswell/smmrelocate.c b/src/cpu/intel/haswell/smmrelocate.c
index 324c5189f9..36ea92a7fc 100644
--- a/src/cpu/intel/haswell/smmrelocate.c
+++ b/src/cpu/intel/haswell/smmrelocate.c
@@ -18,7 +18,6 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ops.h>
-#include <cpu/cpu.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/lapic.h>
#include <cpu/x86/mp.h>
diff --git a/src/cpu/intel/hyperthreading/intel_sibling.c b/src/cpu/intel/hyperthreading/intel_sibling.c
index d9654702e6..b05d3d45e1 100644
--- a/src/cpu/intel/hyperthreading/intel_sibling.c
+++ b/src/cpu/intel/hyperthreading/intel_sibling.c
@@ -12,7 +12,6 @@
*/
#include <console/console.h>
-#include <cpu/cpu.h>
#include <cpu/x86/lapic.h>
#include <cpu/intel/hyperthreading.h>
#include <device/device.h>
diff --git a/src/cpu/intel/microcode/microcode.c b/src/cpu/intel/microcode/microcode.c
index ae34347e26..d217cfd0bf 100644
--- a/src/cpu/intel/microcode/microcode.c
+++ b/src/cpu/intel/microcode/microcode.c
@@ -24,7 +24,7 @@
#else
#include <arch/cbfs.h>
#endif
-#include <cpu/cpu.h>
+#include <arch/cpu.h>
#include <cpu/x86/msr.h>
#include <cpu/intel/microcode.h>
#include <rules.h>
diff --git a/src/cpu/intel/model_2065x/finalize.c b/src/cpu/intel/model_2065x/finalize.c
index 08541c0d89..5b85601182 100644
--- a/src/cpu/intel/model_2065x/finalize.c
+++ b/src/cpu/intel/model_2065x/finalize.c
@@ -16,7 +16,7 @@
#include <stdint.h>
#include <stdlib.h>
-#include <cpu/cpu.h>
+#include <arch/cpu.h>
#include <cpu/x86/msr.h>
#include <cpu/intel/speedstep.h>
#include "model_2065x.h"
diff --git a/src/cpu/intel/model_206ax/finalize.c b/src/cpu/intel/model_206ax/finalize.c
index 5c69ffc368..30b00bbaf1 100644
--- a/src/cpu/intel/model_206ax/finalize.c
+++ b/src/cpu/intel/model_206ax/finalize.c
@@ -16,7 +16,7 @@
#include <stdint.h>
#include <stdlib.h>
-#include <cpu/cpu.h>
+#include <arch/cpu.h>
#include <cpu/x86/msr.h>
#include <cpu/intel/speedstep.h>
#include "model_206ax.h"
diff --git a/src/cpu/intel/slot_1/l2_cache.c b/src/cpu/intel/slot_1/l2_cache.c
index 617a4e6644..7821ad1ff5 100644
--- a/src/cpu/intel/slot_1/l2_cache.c
+++ b/src/cpu/intel/slot_1/l2_cache.c
@@ -40,7 +40,6 @@
#include <stdint.h>
#include <console/console.h>
-#include <cpu/cpu.h>
#include <cpu/intel/l2_cache.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/msr.h>
diff --git a/src/cpu/intel/smm/gen1/smmrelocate.c b/src/cpu/intel/smm/gen1/smmrelocate.c
index 15caa0f57b..426eae5eab 100644
--- a/src/cpu/intel/smm/gen1/smmrelocate.c
+++ b/src/cpu/intel/smm/gen1/smmrelocate.c
@@ -21,7 +21,6 @@
#include <string.h>
#include <device/device.h>
#include <device/pci.h>
-#include <cpu/cpu.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/msr.h>
#include <cpu/x86/mtrr.h>
diff --git a/src/cpu/via/nano/update_ucode.c b/src/cpu/via/nano/update_ucode.c
index efabac6224..cb7d1e0283 100644
--- a/src/cpu/via/nano/update_ucode.c
+++ b/src/cpu/via/nano/update_ucode.c
@@ -18,7 +18,6 @@
#include <cpu/x86/msr.h>
#include <console/console.h>
#include <stddef.h>
-#include <cpu/cpu.h>
#include <arch/cpu.h>
#include <cbfs.h>
diff --git a/src/cpu/x86/mtrr/mtrr.c b/src/cpu/x86/mtrr/mtrr.c
index c8b913cb83..23473dfd3d 100644
--- a/src/cpu/x86/mtrr/mtrr.c
+++ b/src/cpu/x86/mtrr/mtrr.c
@@ -33,7 +33,6 @@
#include <cpu/x86/mtrr.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/lapic.h>
-#include <arch/cpu.h>
#include <arch/acpi.h>
#include <memrange.h>
#include <cpu/amd/mtrr.h>
diff --git a/src/cpu/x86/name/name.c b/src/cpu/x86/name/name.c
index cff2e5c6ad..fc360cd877 100644
--- a/src/cpu/x86/name/name.c
+++ b/src/cpu/x86/name/name.c
@@ -14,8 +14,8 @@
*/
#include <string.h>
+#include <arch/cpu.h>
#include <device/device.h>
-#include <cpu/cpu.h>
#include <cpu/x86/name.h>
void fill_processor_name(char *processor_name)
diff --git a/src/cpu/x86/pae/pgtbl.c b/src/cpu/x86/pae/pgtbl.c
index 49c17b6440..728135dbd3 100644
--- a/src/cpu/x86/pae/pgtbl.c
+++ b/src/cpu/x86/pae/pgtbl.c
@@ -16,7 +16,6 @@
#include <cbfs.h>
#include <commonlib/helpers.h>
#include <console/console.h>
-#include <cpu/cpu.h>
#include <arch/cpu.h>
#include <cpu/x86/cr.h>
#include <cpu/x86/msr.h>
diff --git a/src/drivers/amd/agesa/state_machine.c b/src/drivers/amd/agesa/state_machine.c
index 696b5a4ebe..8fcc60af68 100644
--- a/src/drivers/amd/agesa/state_machine.c
+++ b/src/drivers/amd/agesa/state_machine.c
@@ -18,6 +18,7 @@
#include <string.h>
#include <arch/acpi.h>
+#include <arch/cpu.h>
#include <bootstate.h>
#include <cbfs.h>
#include <cbmem.h>
diff --git a/src/drivers/gic/gic.c b/src/drivers/gic/gic.c
index 80e98ebeef..9ace09fe69 100644
--- a/src/drivers/gic/gic.c
+++ b/src/drivers/gic/gic.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <arch/cpu.h>
#include <arch/io.h>
#include <console/console.h>
#include <gic.h>
diff --git a/src/drivers/i2c/w83793/w83793.c b/src/drivers/i2c/w83793/w83793.c
index d3e776a1c2..8b8f3d238f 100644
--- a/src/drivers/i2c/w83793/w83793.c
+++ b/src/drivers/i2c/w83793/w83793.c
@@ -15,7 +15,6 @@
*/
#include <stdint.h>
-#include <arch/cpu.h>
#include <console/console.h>
#include <device/device.h>
#include "w83793.h"
diff --git a/src/drivers/intel/fsp1_1/stack.c b/src/drivers/intel/fsp1_1/stack.c
index e4b30dd872..06c0e63faa 100644
--- a/src/drivers/intel/fsp1_1/stack.c
+++ b/src/drivers/intel/fsp1_1/stack.c
@@ -14,6 +14,7 @@
* GNU General Public License for more details.
*/
+#include <arch/cpu.h>
#include <cbmem.h>
#include <console/console.h>
#include <cpu/x86/mtrr.h>
diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c
index 5eeea29504..bb64cd5fef 100644
--- a/src/drivers/intel/fsp2_0/memory_init.c
+++ b/src/drivers/intel/fsp2_0/memory_init.c
@@ -13,7 +13,6 @@
#include <security/vboot/antirollback.h>
#include <arch/io.h>
-#include <arch/cpu.h>
#include <arch/symbols.h>
#include <assert.h>
#include <cbfs.h>
diff --git a/src/drivers/intel/fsp2_0/notify.c b/src/drivers/intel/fsp2_0/notify.c
index 2907ae25b1..c3a2804327 100644
--- a/src/drivers/intel/fsp2_0/notify.c
+++ b/src/drivers/intel/fsp2_0/notify.c
@@ -10,7 +10,6 @@
* (at your option) any later version.
*/
-#include <arch/cpu.h>
#include <bootstate.h>
#include <console/console.h>
#include <fsp/util.h>
diff --git a/src/drivers/intel/fsp2_0/silicon_init.c b/src/drivers/intel/fsp2_0/silicon_init.c
index 0461b68078..06706639ce 100644
--- a/src/drivers/intel/fsp2_0/silicon_init.c
+++ b/src/drivers/intel/fsp2_0/silicon_init.c
@@ -10,7 +10,6 @@
* (at your option) any later version.
*/
-#include <arch/cpu.h>
#include <cbfs.h>
#include <cbmem.h>
#include <commonlib/fsp.h>
diff --git a/src/drivers/intel/fsp2_0/upd_display.c b/src/drivers/intel/fsp2_0/upd_display.c
index 19803c4f2f..363ee361b4 100644
--- a/src/drivers/intel/fsp2_0/upd_display.c
+++ b/src/drivers/intel/fsp2_0/upd_display.c
@@ -9,7 +9,6 @@
* (at your option) any later version.
*/
-#include <arch/cpu.h>
#include <console/console.h>
#include <fsp/util.h>
#include <lib.h>
diff --git a/src/include/cpu/amd/model_10xxx_rev.h b/src/include/cpu/amd/model_10xxx_rev.h
index c6fa8f66bb..88d395e5c8 100644
--- a/src/include/cpu/amd/model_10xxx_rev.h
+++ b/src/include/cpu/amd/model_10xxx_rev.h
@@ -16,8 +16,6 @@
#ifndef __CPU_AMD_MODEL_10XXX_REV_H__
#define __CPU_AMD_MODEL_10XXX_REV_H__
-#include <arch/cpu.h>
-
int init_processor_name(void);
/* place holder for Family 10 revision code */
diff --git a/src/include/cpu/x86/cr.h b/src/include/cpu/x86/cr.h
index 5d8dcd2ad4..0f14d5451d 100644
--- a/src/include/cpu/x86/cr.h
+++ b/src/include/cpu/x86/cr.h
@@ -19,7 +19,6 @@
#if !defined(__ASSEMBLER__)
#include <stdint.h>
-#include <arch/cpu.h>
/* ROMCC apparently chokes certain clobber registers. */
#if defined(__ROMCC__)
diff --git a/src/mainboard/adi/rcc-dff/romstage.c b/src/mainboard/adi/rcc-dff/romstage.c
index c7c78e2fad..9da58ec51e 100644
--- a/src/mainboard/adi/rcc-dff/romstage.c
+++ b/src/mainboard/adi/rcc-dff/romstage.c
@@ -23,7 +23,6 @@
#include <southbridge/intel/fsp_rangeley/soc.h>
#include <southbridge/intel/fsp_rangeley/gpio.h>
#include <southbridge/intel/fsp_rangeley/romstage.h>
-#include <arch/cpu.h>
#include "gpio.h"
static void interrupt_routing_config(void)
diff --git a/src/mainboard/advansus/a785e-i/romstage.c b/src/mainboard/advansus/a785e-i/romstage.c
index 281a59aa99..1454ece502 100644
--- a/src/mainboard/advansus/a785e-i/romstage.c
+++ b/src/mainboard/advansus/a785e-i/romstage.c
@@ -30,6 +30,7 @@
#include <timestamp.h>
#include <cpu/amd/model_10xxx_rev.h>
#include <cpu/x86/lapic.h>
+#include <arch/cpu.h>
#include <commonlib/loglevel.h>
#include <cpu/x86/bist.h>
#include <superio/winbond/common/winbond.h>
diff --git a/src/mainboard/amd/bettong/mptable.c b/src/mainboard/amd/bettong/mptable.c
index 08b243b4a4..e541c0ad3a 100644
--- a/src/mainboard/amd/bettong/mptable.c
+++ b/src/mainboard/amd/bettong/mptable.c
@@ -19,7 +19,6 @@
#include <arch/ioapic.h>
#include <string.h>
#include <stdint.h>
-#include <arch/cpu.h>
#include <cpu/x86/lapic.h>
#include <southbridge/amd/pi/hudson/hudson.h>
#include <southbridge/amd/common/amd_pci_util.h>
diff --git a/src/mainboard/amd/bettong/romstage.c b/src/mainboard/amd/bettong/romstage.c
index eefae85337..25bae30402 100644
--- a/src/mainboard/amd/bettong/romstage.c
+++ b/src/mainboard/amd/bettong/romstage.c
@@ -17,6 +17,7 @@
#include <arch/acpi.h>
#include <arch/io.h>
#include <arch/stages.h>
+#include <arch/cpu.h>
#include <cpu/x86/lapic.h>
#include <cpu/x86/bist.h>
#include <cpu/amd/car.h>
diff --git a/src/mainboard/amd/bimini_fam10/romstage.c b/src/mainboard/amd/bimini_fam10/romstage.c
index 51bc5d577b..84513b8166 100644
--- a/src/mainboard/amd/bimini_fam10/romstage.c
+++ b/src/mainboard/amd/bimini_fam10/romstage.c
@@ -24,6 +24,7 @@
#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <arch/io.h>
+#include <arch/cpu.h>
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
#include <console/console.h>
diff --git a/src/mainboard/amd/db-ft3b-lc/mptable.c b/src/mainboard/amd/db-ft3b-lc/mptable.c
index 0956325e27..6495a27d6e 100644
--- a/src/mainboard/amd/db-ft3b-lc/mptable.c
+++ b/src/mainboard/amd/db-ft3b-lc/mptable.c
@@ -20,7 +20,6 @@
#include <arch/ioapic.h>
#include <string.h>
#include <stdint.h>
-#include <arch/cpu.h>
#include <cpu/x86/lapic.h>
#include <southbridge/amd/common/amd_pci_util.h>
diff --git a/src/mainboard/amd/gardenia/mptable.c b/src/mainboard/amd/gardenia/mptable.c
index 2dcf4a3cb2..0cda7f7676 100644
--- a/src/mainboard/amd/gardenia/mptable.c
+++ b/src/mainboard/amd/gardenia/mptable.c
@@ -19,7 +19,6 @@
#include <arch/ioapic.h>
#include <string.h>
#include <stdint.h>
-#include <arch/cpu.h>
#include <cpu/x86/lapic.h>
#include <soc/southbridge.h>
#include <amdblocks/amd_pci_util.h>
diff --git a/src/mainboard/amd/lamar/mptable.c b/src/mainboard/amd/lamar/mptable.c
index ed1692397f..6937de8847 100644
--- a/src/mainboard/amd/lamar/mptable.c
+++ b/src/mainboard/amd/lamar/mptable.c
@@ -19,7 +19,6 @@
#include <arch/ioapic.h>
#include <string.h>
#include <stdint.h>
-#include <arch/cpu.h>
#include <cpu/x86/lapic.h>
#include <southbridge/amd/common/amd_pci_util.h>
#include <drivers/generic/ioapic/chip.h>
diff --git a/src/mainboard/amd/mahogany_fam10/romstage.c b/src/mainboard/amd/mahogany_fam10/romstage.c
index e9f31112ff..c052976943 100644
--- a/src/mainboard/amd/mahogany_fam10/romstage.c
+++ b/src/mainboard/amd/mahogany_fam10/romstage.c
@@ -26,6 +26,7 @@
#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <arch/io.h>
+#include <arch/cpu.h>
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
#include <console/console.h>
diff --git a/src/mainboard/amd/olivehill/mptable.c b/src/mainboard/amd/olivehill/mptable.c
index 443f55155b..c94c9c8617 100644
--- a/src/mainboard/amd/olivehill/mptable.c
+++ b/src/mainboard/amd/olivehill/mptable.c
@@ -19,7 +19,6 @@
#include <arch/ioapic.h>
#include <string.h>
#include <stdint.h>
-#include <arch/cpu.h>
#include <cpu/x86/lapic.h>
#include <southbridge/amd/agesa/hudson/hudson.h>
diff --git a/src/mainboard/amd/olivehillplus/mptable.c b/src/mainboard/amd/olivehillplus/mptable.c
index 1b25e811a7..6c3b05abde 100644
--- a/src/mainboard/amd/olivehillplus/mptable.c
+++ b/src/mainboard/amd/olivehillplus/mptable.c
@@ -19,7 +19,6 @@
#include <arch/ioapic.h>
#include <string.h>
#include <stdint.h>
-#include <arch/cpu.h>
#include <cpu/x86/lapic.h>
#include <southbridge/amd/pi/hudson/hudson.h>
diff --git a/src/mainboard/amd/parmer/mptable.c b/src/mainboard/amd/parmer/mptable.c
index e916a24f9d..e75181184c 100644
--- a/src/mainboard/amd/parmer/mptable.c
+++ b/src/mainboard/amd/parmer/mptable.c
@@ -19,7 +19,6 @@
#include <arch/ioapic.h>
#include <string.h>
#include <stdint.h>
-#include <arch/cpu.h>
#include <cpu/x86/lapic.h>
#include <southbridge/amd/agesa/hudson/hudson.h>
diff --git a/src/mainboard/amd/parmer/romstage.c b/src/mainboard/amd/parmer/romstage.c
index 1736d48bc2..1eb92037d6 100644
--- a/src/mainboard/amd/parmer/romstage.c
+++ b/src/mainboard/amd/parmer/romstage.c
@@ -14,7 +14,6 @@
*/
#include <arch/io.h>
-#include <arch/cpu.h>
#include <northbridge/amd/agesa/state_machine.h>
#include <southbridge/amd/agesa/hudson/hudson.h>
diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c b/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c
index 622784be51..fd02782661 100644
--- a/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c
+++ b/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c
@@ -24,6 +24,7 @@
#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <arch/io.h>
+#include <arch/cpu.h>
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
#include <console/console.h>
diff --git a/src/mainboard/amd/thatcher/mptable.c b/src/mainboard/amd/thatcher/mptable.c
index 06a49d4018..0c487c5b17 100644
--- a/src/mainboard/amd/thatcher/mptable.c
+++ b/src/mainboard/amd/thatcher/mptable.c
@@ -19,7 +19,6 @@
#include <arch/ioapic.h>
#include <string.h>
#include <stdint.h>
-#include <arch/cpu.h>
#include <cpu/x86/lapic.h>
#include <southbridge/amd/agesa/hudson/hudson.h>
diff --git a/src/mainboard/amd/thatcher/romstage.c b/src/mainboard/amd/thatcher/romstage.c
index 99e7bbd8ca..d4097fff29 100644
--- a/src/mainboard/amd/thatcher/romstage.c
+++ b/src/mainboard/amd/thatcher/romstage.c
@@ -21,7 +21,6 @@
#include <arch/io.h>
#include <arch/stages.h>
#include <device/pnp_def.h>
-#include <arch/cpu.h>
#include <commonlib/loglevel.h>
#include <northbridge/amd/agesa/state_machine.h>
#include <southbridge/amd/agesa/hudson/hudson.h>
diff --git a/src/mainboard/amd/tilapia_fam10/romstage.c b/src/mainboard/amd/tilapia_fam10/romstage.c
index fbb9238a72..1205de1d03 100644
--- a/src/mainboard/amd/tilapia_fam10/romstage.c
+++ b/src/mainboard/amd/tilapia_fam10/romstage.c
@@ -24,6 +24,7 @@
#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <arch/io.h>
+#include <arch/cpu.h>
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
#include <console/console.h>
diff --git a/src/mainboard/aopen/dxplplusu/romstage.c b/src/mainboard/aopen/dxplplusu/romstage.c
index d18c2ad594..73a9ce07e3 100644
--- a/src/mainboard/aopen/dxplplusu/romstage.c
+++ b/src/mainboard/aopen/dxplplusu/romstage.c
@@ -16,7 +16,6 @@
#include <stdint.h>
#include <device/pci_def.h>
#include <arch/io.h>
-#include <arch/cpu.h>
#include <stdlib.h>
#include <cbmem.h>
#include <console/console.h>
diff --git a/src/mainboard/asrock/imb-a180/mptable.c b/src/mainboard/asrock/imb-a180/mptable.c
index 04bd054153..8e1b1c1b66 100644
--- a/src/mainboard/asrock/imb-a180/mptable.c
+++ b/src/mainboard/asrock/imb-a180/mptable.c
@@ -19,7 +19,6 @@
#include <arch/ioapic.h>
#include <string.h>
#include <stdint.h>
-#include <arch/cpu.h>
#include <cpu/x86/lapic.h>
#include <southbridge/amd/agesa/hudson/hudson.h>
diff --git a/src/mainboard/asus/am1i-a/mptable.c b/src/mainboard/asus/am1i-a/mptable.c
index d829f0618a..c131a43e4f 100644
--- a/src/mainboard/asus/am1i-a/mptable.c
+++ b/src/mainboard/asus/am1i-a/mptable.c
@@ -20,7 +20,6 @@
#include <arch/ioapic.h>
#include <string.h>
#include <stdint.h>
-#include <arch/cpu.h>
#include <cpu/x86/lapic.h>
#include <southbridge/amd/common/amd_pci_util.h>
#include <drivers/generic/ioapic/chip.h>
diff --git a/src/mainboard/asus/f2a85-m/mptable.c b/src/mainboard/asus/f2a85-m/mptable.c
index a66900b68e..d97663d89e 100644
--- a/src/mainboard/asus/f2a85-m/mptable.c
+++ b/src/mainboard/asus/f2a85-m/mptable.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <arch/cpu.h>
#include <arch/io.h>
#include <arch/ioapic.h>
#include <arch/smp/mpspec.h>
@@ -23,7 +22,6 @@
#include <string.h>
#include <southbridge/amd/agesa/hudson/hudson.h>
-
u8 picr_data[] = {
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x0A,0xF1,0x00,0x00,0x1F,0x1F,0x1F,0x1F,
0x09,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
diff --git a/src/mainboard/asus/kcma-d8/resourcemap.c b/src/mainboard/asus/kcma-d8/resourcemap.c
index 60bc3a7b30..5e66c56251 100644
--- a/src/mainboard/asus/kcma-d8/resourcemap.c
+++ b/src/mainboard/asus/kcma-d8/resourcemap.c
@@ -17,6 +17,8 @@
* GNU General Public License for more details.
*/
+#include <arch/cpu.h>
+
static void setup_mb_resource_map(void)
{
static const unsigned int fam15h_register_values[] = {
diff --git a/src/mainboard/asus/kcma-d8/romstage.c b/src/mainboard/asus/kcma-d8/romstage.c
index ec76c45f6a..8f156bce23 100644
--- a/src/mainboard/asus/kcma-d8/romstage.c
+++ b/src/mainboard/asus/kcma-d8/romstage.c
@@ -22,6 +22,7 @@
#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <arch/io.h>
+#include <arch/cpu.h>
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
#include <console/console.h>
diff --git a/src/mainboard/asus/kfsn4-dre/romstage.c b/src/mainboard/asus/kfsn4-dre/romstage.c
index 6045274692..54a76e21fa 100644
--- a/src/mainboard/asus/kfsn4-dre/romstage.c
+++ b/src/mainboard/asus/kfsn4-dre/romstage.c
@@ -25,6 +25,7 @@
#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <arch/io.h>
+#include <arch/cpu.h>
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
#include <console/console.h>
diff --git a/src/mainboard/asus/kgpe-d16/resourcemap.c b/src/mainboard/asus/kgpe-d16/resourcemap.c
index c4dea39dbc..6d6e556183 100644
--- a/src/mainboard/asus/kgpe-d16/resourcemap.c
+++ b/src/mainboard/asus/kgpe-d16/resourcemap.c
@@ -17,6 +17,8 @@
* GNU General Public License for more details.
*/
+#include <arch/cpu.h>
+
static void setup_mb_resource_map(void)
{
static const unsigned int fam15h_register_values[] = {
diff --git a/src/mainboard/asus/kgpe-d16/romstage.c b/src/mainboard/asus/kgpe-d16/romstage.c
index 9b72a79cfa..9913462fa0 100644
--- a/src/mainboard/asus/kgpe-d16/romstage.c
+++ b/src/mainboard/asus/kgpe-d16/romstage.c
@@ -22,6 +22,7 @@
#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <arch/io.h>
+#include <arch/cpu.h>
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
#include <console/console.h>
diff --git a/src/mainboard/asus/m4a78-em/romstage.c b/src/mainboard/asus/m4a78-em/romstage.c
index 41845864f8..b6c4bdc803 100644
--- a/src/mainboard/asus/m4a78-em/romstage.c
+++ b/src/mainboard/asus/m4a78-em/romstage.c
@@ -25,6 +25,7 @@
#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <arch/io.h>
+#include <arch/cpu.h>
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
#include <console/console.h>
diff --git a/src/mainboard/asus/m4a785-m/romstage.c b/src/mainboard/asus/m4a785-m/romstage.c
index d7538c8eef..b9ac888d7a 100644
--- a/src/mainboard/asus/m4a785-m/romstage.c
+++ b/src/mainboard/asus/m4a785-m/romstage.c
@@ -26,6 +26,7 @@
#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <arch/io.h>
+#include <arch/cpu.h>
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
#include <console/console.h>
diff --git a/src/mainboard/asus/m5a88-v/romstage.c b/src/mainboard/asus/m5a88-v/romstage.c
index 512c08e34f..8f900ee8ca 100644
--- a/src/mainboard/asus/m5a88-v/romstage.c
+++ b/src/mainboard/asus/m5a88-v/romstage.c
@@ -26,6 +26,7 @@
#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <arch/io.h>
+#include <arch/cpu.h>
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
#include <console/console.h>
diff --git a/src/mainboard/avalue/eax-785e/romstage.c b/src/mainboard/avalue/eax-785e/romstage.c
index 49352ca734..22e3c5d1f0 100644
--- a/src/mainboard/avalue/eax-785e/romstage.c
+++ b/src/mainboard/avalue/eax-785e/romstage.c
@@ -24,6 +24,7 @@
#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <arch/io.h>
+#include <arch/cpu.h>
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
#include <console/console.h>
diff --git a/src/mainboard/bap/ode_e20XX/mptable.c b/src/mainboard/bap/ode_e20XX/mptable.c
index 3c8352e342..fc14165c2d 100644
--- a/src/mainboard/bap/ode_e20XX/mptable.c
+++ b/src/mainboard/bap/ode_e20XX/mptable.c
@@ -19,7 +19,6 @@
#include <arch/ioapic.h>
#include <string.h>
#include <stdint.h>
-#include <arch/cpu.h>
#include <cpu/x86/lapic.h>
#include <southbridge/amd/common/amd_pci_util.h>
#include <drivers/generic/ioapic/chip.h>
diff --git a/src/mainboard/bap/ode_e21XX/mptable.c b/src/mainboard/bap/ode_e21XX/mptable.c
index 1b25e811a7..6c3b05abde 100644
--- a/src/mainboard/bap/ode_e21XX/mptable.c
+++ b/src/mainboard/bap/ode_e21XX/mptable.c
@@ -19,7 +19,6 @@
#include <arch/ioapic.h>
#include <string.h>
#include <stdint.h>
-#include <arch/cpu.h>
#include <cpu/x86/lapic.h>
#include <southbridge/amd/pi/hudson/hudson.h>
diff --git a/src/mainboard/biostar/a68n_5200/mptable.c b/src/mainboard/biostar/a68n_5200/mptable.c
index 443f55155b..c94c9c8617 100644
--- a/src/mainboard/biostar/a68n_5200/mptable.c
+++ b/src/mainboard/biostar/a68n_5200/mptable.c
@@ -19,7 +19,6 @@
#include <arch/ioapic.h>
#include <string.h>
#include <stdint.h>
-#include <arch/cpu.h>
#include <cpu/x86/lapic.h>
#include <southbridge/amd/agesa/hudson/hudson.h>
diff --git a/src/mainboard/biostar/am1ml/mptable.c b/src/mainboard/biostar/am1ml/mptable.c
index 5bf669aca7..637ae9a1ec 100644
--- a/src/mainboard/biostar/am1ml/mptable.c
+++ b/src/mainboard/biostar/am1ml/mptable.c
@@ -19,7 +19,6 @@
#include <arch/ioapic.h>
#include <string.h>
#include <stdint.h>
-#include <arch/cpu.h>
#include <cpu/x86/lapic.h>
#include <southbridge/amd/common/amd_pci_util.h>
#include <drivers/generic/ioapic/chip.h>
diff --git a/src/mainboard/gigabyte/ma785gm/romstage.c b/src/mainboard/gigabyte/ma785gm/romstage.c
index 87bfaba5fd..f556a1af19 100644
--- a/src/mainboard/gigabyte/ma785gm/romstage.c
+++ b/src/mainboard/gigabyte/ma785gm/romstage.c
@@ -22,6 +22,7 @@
#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <arch/io.h>
+#include <arch/cpu.h>
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
#include <console/console.h>
diff --git a/src/mainboard/gigabyte/ma785gmt/romstage.c b/src/mainboard/gigabyte/ma785gmt/romstage.c
index 0b9e07dab0..abf862881c 100644
--- a/src/mainboard/gigabyte/ma785gmt/romstage.c
+++ b/src/mainboard/gigabyte/ma785gmt/romstage.c
@@ -22,6 +22,7 @@
#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <arch/io.h>
+#include <arch/cpu.h>
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
#include <console/console.h>
diff --git a/src/mainboard/gigabyte/ma78gm/romstage.c b/src/mainboard/gigabyte/ma78gm/romstage.c
index 8dbdfb07c8..f004911faa 100644
--- a/src/mainboard/gigabyte/ma78gm/romstage.c
+++ b/src/mainboard/gigabyte/ma78gm/romstage.c
@@ -25,6 +25,7 @@
#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <arch/io.h>
+#include <arch/cpu.h>
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
#include <console/console.h>
diff --git a/src/mainboard/gizmosphere/gizmo2/mptable.c b/src/mainboard/gizmosphere/gizmo2/mptable.c
index 3c8352e342..fc14165c2d 100644
--- a/src/mainboard/gizmosphere/gizmo2/mptable.c
+++ b/src/mainboard/gizmosphere/gizmo2/mptable.c
@@ -19,7 +19,6 @@
#include <arch/ioapic.h>
#include <string.h>
#include <stdint.h>
-#include <arch/cpu.h>
#include <cpu/x86/lapic.h>
#include <southbridge/amd/common/amd_pci_util.h>
#include <drivers/generic/ioapic/chip.h>
diff --git a/src/mainboard/google/butterfly/romstage.c b/src/mainboard/google/butterfly/romstage.c
index 75da9b7ad3..a8b3c6b100 100644
--- a/src/mainboard/google/butterfly/romstage.c
+++ b/src/mainboard/google/butterfly/romstage.c
@@ -28,7 +28,6 @@
#include <northbridge/intel/sandybridge/raminit_native.h>
#include <southbridge/intel/bd82x6x/pch.h>
#include <southbridge/intel/common/gpio.h>
-#include <arch/cpu.h>
#include <halt.h>
#if IS_ENABLED(CONFIG_CHROMEOS)
#include <vendorcode/google/chromeos/chromeos.h>
diff --git a/src/mainboard/google/kahlee/mptable.c b/src/mainboard/google/kahlee/mptable.c
index 2dcf4a3cb2..0cda7f7676 100644
--- a/src/mainboard/google/kahlee/mptable.c
+++ b/src/mainboard/google/kahlee/mptable.c
@@ -19,7 +19,6 @@
#include <arch/ioapic.h>
#include <string.h>
#include <stdint.h>
-#include <arch/cpu.h>
#include <cpu/x86/lapic.h>
#include <soc/southbridge.h>
#include <amdblocks/amd_pci_util.h>
diff --git a/src/mainboard/google/link/romstage.c b/src/mainboard/google/link/romstage.c
index 495c80ee6d..176be9d854 100644
--- a/src/mainboard/google/link/romstage.c
+++ b/src/mainboard/google/link/romstage.c
@@ -30,7 +30,6 @@
#include <northbridge/intel/sandybridge/raminit_native.h>
#include <southbridge/intel/common/gpio.h>
#include "ec/google/chromeec/ec.h"
-#include <arch/cpu.h>
#include <halt.h>
#include <cbfs.h>
diff --git a/src/mainboard/google/nyan/romstage.c b/src/mainboard/google/nyan/romstage.c
index b96917e482..ba5c0e23ab 100644
--- a/src/mainboard/google/nyan/romstage.c
+++ b/src/mainboard/google/nyan/romstage.c
@@ -14,7 +14,6 @@
*/
#include <arch/cache.h>
-#include <arch/cpu.h>
#include <arch/exception.h>
#include <arch/io.h>
#include <cbfs.h>
diff --git a/src/mainboard/google/nyan_big/romstage.c b/src/mainboard/google/nyan_big/romstage.c
index b96917e482..ba5c0e23ab 100644
--- a/src/mainboard/google/nyan_big/romstage.c
+++ b/src/mainboard/google/nyan_big/romstage.c
@@ -14,7 +14,6 @@
*/
#include <arch/cache.h>
-#include <arch/cpu.h>
#include <arch/exception.h>
#include <arch/io.h>
#include <cbfs.h>
diff --git a/src/mainboard/google/nyan_blaze/romstage.c b/src/mainboard/google/nyan_blaze/romstage.c
index cc8f90e3da..34967b6180 100644
--- a/src/mainboard/google/nyan_blaze/romstage.c
+++ b/src/mainboard/google/nyan_blaze/romstage.c
@@ -14,7 +14,6 @@
*/
#include <arch/cache.h>
-#include <arch/cpu.h>
#include <arch/exception.h>
#include <arch/io.h>
#include <cbfs.h>
diff --git a/src/mainboard/google/parrot/romstage.c b/src/mainboard/google/parrot/romstage.c
index 98ebb25d82..bceaa884d0 100644
--- a/src/mainboard/google/parrot/romstage.c
+++ b/src/mainboard/google/parrot/romstage.c
@@ -28,7 +28,6 @@
#include <northbridge/intel/sandybridge/raminit_native.h>
#include <southbridge/intel/bd82x6x/pch.h>
#include <southbridge/intel/common/gpio.h>
-#include <arch/cpu.h>
#include <halt.h>
#include <cbfs.h>
#include "ec/compal/ene932/ec.h"
diff --git a/src/mainboard/google/stout/romstage.c b/src/mainboard/google/stout/romstage.c
index d56dfd40be..a534f0f5d6 100644
--- a/src/mainboard/google/stout/romstage.c
+++ b/src/mainboard/google/stout/romstage.c
@@ -29,7 +29,6 @@
#include <northbridge/intel/sandybridge/raminit_native.h>
#include <southbridge/intel/bd82x6x/pch.h>
#include <southbridge/intel/common/gpio.h>
-#include <arch/cpu.h>
#include <halt.h>
#include <bootmode.h>
#include <cbfs.h>
diff --git a/src/mainboard/hp/abm/mptable.c b/src/mainboard/hp/abm/mptable.c
index 04bd054153..c94c9c8617 100644
--- a/src/mainboard/hp/abm/mptable.c
+++ b/src/mainboard/hp/abm/mptable.c
@@ -19,11 +19,9 @@
#include <arch/ioapic.h>
#include <string.h>
#include <stdint.h>
-#include <arch/cpu.h>
#include <cpu/x86/lapic.h>
#include <southbridge/amd/agesa/hudson/hudson.h>
-
u8 picr_data[0x54] = {
0x03,0x04,0x05,0x07,0x0B,0x0A,0x1F,0x1F,0xFA,0xF1,0x00,0x00,0x1F,0x1F,0x1F,0x1F,
0x1F,0x1F,0x1F,0x03,0x1F,0x1F,0x1F,0x1F,0x1F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
diff --git a/src/mainboard/hp/dl165_g6_fam10/romstage.c b/src/mainboard/hp/dl165_g6_fam10/romstage.c
index 5af01c176f..ada0d2fd2a 100644
--- a/src/mainboard/hp/dl165_g6_fam10/romstage.c
+++ b/src/mainboard/hp/dl165_g6_fam10/romstage.c
@@ -29,6 +29,7 @@
#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <arch/io.h>
+#include <arch/cpu.h>
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
#include "option_table.h"
diff --git a/src/mainboard/hp/pavilion_m6_1035dx/mptable.c b/src/mainboard/hp/pavilion_m6_1035dx/mptable.c
index e94243f446..66f8f463f1 100644
--- a/src/mainboard/hp/pavilion_m6_1035dx/mptable.c
+++ b/src/mainboard/hp/pavilion_m6_1035dx/mptable.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <arch/cpu.h>
#include <arch/io.h>
#include <arch/ioapic.h>
#include <arch/smp/mpspec.h>
@@ -23,7 +22,6 @@
#include <string.h>
#include <southbridge/amd/agesa/hudson/hudson.h>
-
u8 picr_data[0x54] = {
0x1F,0x1f,0x1f,0x1F,0x1F,0x1F,0x1F,0x1F,0x0A,0xF1,0x00,0x00,0x1F,0x1F,0x1F,0x1F,
0x09,0x1F,0x1F,0x0B,0x1F,0x0B,0x1F,0x1F,0x1F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
diff --git a/src/mainboard/iei/kino-780am2-fam10/romstage.c b/src/mainboard/iei/kino-780am2-fam10/romstage.c
index 815cf34d92..4a6d011aa6 100644
--- a/src/mainboard/iei/kino-780am2-fam10/romstage.c
+++ b/src/mainboard/iei/kino-780am2-fam10/romstage.c
@@ -25,6 +25,7 @@
#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <arch/io.h>
+#include <arch/cpu.h>
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
#include <console/console.h>
diff --git a/src/mainboard/intel/bayleybay_fsp/romstage.c b/src/mainboard/intel/bayleybay_fsp/romstage.c
index 6cb53904c0..84f705463b 100644
--- a/src/mainboard/intel/bayleybay_fsp/romstage.c
+++ b/src/mainboard/intel/bayleybay_fsp/romstage.c
@@ -15,7 +15,6 @@
*/
#include <stddef.h>
-#include <arch/cpu.h>
#include <lib.h>
#include <arch/io.h>
#include <arch/cbfs.h>
diff --git a/src/mainboard/intel/cougar_canyon2/romstage.c b/src/mainboard/intel/cougar_canyon2/romstage.c
index f6c867a001..3813aefa99 100644
--- a/src/mainboard/intel/cougar_canyon2/romstage.c
+++ b/src/mainboard/intel/cougar_canyon2/romstage.c
@@ -15,7 +15,6 @@
* GNU General Public License for more details.
*/
-
#include <stdint.h>
#include <string.h>
#include <lib.h>
@@ -36,7 +35,6 @@
#include <southbridge/intel/fsp_bd82x6x/pch.h>
#include <southbridge/intel/fsp_bd82x6x/gpio.h>
#include <southbridge/intel/fsp_bd82x6x/me.h>
-#include <arch/cpu.h>
#include "gpio.h"
#define SIO_PORT 0x164e
diff --git a/src/mainboard/intel/emeraldlake2/romstage.c b/src/mainboard/intel/emeraldlake2/romstage.c
index a672294ae0..fa511fa2a4 100644
--- a/src/mainboard/intel/emeraldlake2/romstage.c
+++ b/src/mainboard/intel/emeraldlake2/romstage.c
@@ -29,7 +29,6 @@
#include <northbridge/intel/sandybridge/raminit_native.h>
#include <southbridge/intel/bd82x6x/pch.h>
#include <southbridge/intel/common/gpio.h>
-#include <arch/cpu.h>
#include <halt.h>
#define SIO_PORT 0x164e
diff --git a/src/mainboard/intel/harcuvar/acpi_tables.c b/src/mainboard/intel/harcuvar/acpi_tables.c
index 5e5b25b1c4..3d83d3cbd1 100644
--- a/src/mainboard/intel/harcuvar/acpi_tables.c
+++ b/src/mainboard/intel/harcuvar/acpi_tables.c
@@ -24,7 +24,6 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
-#include <cpu/cpu.h>
#include <cpu/x86/msr.h>
#include <soc/acpi.h>
diff --git a/src/mainboard/intel/littleplains/romstage.c b/src/mainboard/intel/littleplains/romstage.c
index c7c78e2fad..9da58ec51e 100644
--- a/src/mainboard/intel/littleplains/romstage.c
+++ b/src/mainboard/intel/littleplains/romstage.c
@@ -23,7 +23,6 @@
#include <southbridge/intel/fsp_rangeley/soc.h>
#include <southbridge/intel/fsp_rangeley/gpio.h>
#include <southbridge/intel/fsp_rangeley/romstage.h>
-#include <arch/cpu.h>
#include "gpio.h"
static void interrupt_routing_config(void)
diff --git a/src/mainboard/intel/mohonpeak/romstage.c b/src/mainboard/intel/mohonpeak/romstage.c
index c7c78e2fad..9da58ec51e 100644
--- a/src/mainboard/intel/mohonpeak/romstage.c
+++ b/src/mainboard/intel/mohonpeak/romstage.c
@@ -23,7 +23,6 @@
#include <southbridge/intel/fsp_rangeley/soc.h>
#include <southbridge/intel/fsp_rangeley/gpio.h>
#include <southbridge/intel/fsp_rangeley/romstage.h>
-#include <arch/cpu.h>
#include "gpio.h"
static void interrupt_routing_config(void)
diff --git a/src/mainboard/intel/stargo2/romstage.c b/src/mainboard/intel/stargo2/romstage.c
index cdf087aa3f..fea3872eaf 100644
--- a/src/mainboard/intel/stargo2/romstage.c
+++ b/src/mainboard/intel/stargo2/romstage.c
@@ -19,7 +19,6 @@
#include <string.h>
#include <lib.h>
#include <timestamp.h>
-#include <arch/cpu.h>
#include <arch/io.h>
#include <device/pci_def.h>
#include <device/pnp_def.h>
diff --git a/src/mainboard/jetway/pa78vm5/romstage.c b/src/mainboard/jetway/pa78vm5/romstage.c
index 440d703ea5..b1ac722d3d 100644
--- a/src/mainboard/jetway/pa78vm5/romstage.c
+++ b/src/mainboard/jetway/pa78vm5/romstage.c
@@ -26,6 +26,7 @@
#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <arch/io.h>
+#include <arch/cpu.h>
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
#include <console/console.h>
diff --git a/src/mainboard/kontron/ktqm77/romstage.c b/src/mainboard/kontron/ktqm77/romstage.c
index f7251a51a1..8995aa21ab 100644
--- a/src/mainboard/kontron/ktqm77/romstage.c
+++ b/src/mainboard/kontron/ktqm77/romstage.c
@@ -27,7 +27,6 @@
#include <northbridge/intel/sandybridge/raminit_native.h>
#include <southbridge/intel/bd82x6x/pch.h>
#include <southbridge/intel/common/gpio.h>
-#include <arch/cpu.h>
#include <cpu/x86/msr.h>
#include <halt.h>
#include <superio/winbond/common/winbond.h>
diff --git a/src/mainboard/lenovo/g505s/mptable.c b/src/mainboard/lenovo/g505s/mptable.c
index e94243f446..66f8f463f1 100644
--- a/src/mainboard/lenovo/g505s/mptable.c
+++ b/src/mainboard/lenovo/g505s/mptable.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <arch/cpu.h>
#include <arch/io.h>
#include <arch/ioapic.h>
#include <arch/smp/mpspec.h>
@@ -23,7 +22,6 @@
#include <string.h>
#include <southbridge/amd/agesa/hudson/hudson.h>
-
u8 picr_data[0x54] = {
0x1F,0x1f,0x1f,0x1F,0x1F,0x1F,0x1F,0x1F,0x0A,0xF1,0x00,0x00,0x1F,0x1F,0x1F,0x1F,
0x09,0x1F,0x1F,0x0B,0x1F,0x0B,0x1F,0x1F,0x1F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
diff --git a/src/mainboard/lenovo/t520/romstage.c b/src/mainboard/lenovo/t520/romstage.c
index c9a7f8e9ac..0ad74f56e1 100644
--- a/src/mainboard/lenovo/t520/romstage.c
+++ b/src/mainboard/lenovo/t520/romstage.c
@@ -29,8 +29,6 @@
#include <northbridge/intel/sandybridge/raminit_native.h>
#include <southbridge/intel/bd82x6x/pch.h>
#include <southbridge/intel/common/gpio.h>
-#include <arch/cpu.h>
-#include <cbfs.h>
#include <drivers/lenovo/hybrid_graphics/hybrid_graphics.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/mainboard/lenovo/x1_carbon_gen1/romstage.c b/src/mainboard/lenovo/x1_carbon_gen1/romstage.c
index bd1c6a3180..90bf2ebe26 100644
--- a/src/mainboard/lenovo/x1_carbon_gen1/romstage.c
+++ b/src/mainboard/lenovo/x1_carbon_gen1/romstage.c
@@ -31,7 +31,6 @@
#include <northbridge/intel/sandybridge/raminit_native.h>
#include <southbridge/intel/bd82x6x/pch.h>
#include <southbridge/intel/common/gpio.h>
-#include <arch/cpu.h>
#include <cbfs.h>
void pch_enable_lpc(void)
diff --git a/src/mainboard/lenovo/x220/romstage.c b/src/mainboard/lenovo/x220/romstage.c
index 7ca05843ce..36fd3ca8db 100644
--- a/src/mainboard/lenovo/x220/romstage.c
+++ b/src/mainboard/lenovo/x220/romstage.c
@@ -30,7 +30,6 @@
#include <northbridge/intel/sandybridge/raminit_native.h>
#include <southbridge/intel/bd82x6x/pch.h>
#include <southbridge/intel/common/gpio.h>
-#include <arch/cpu.h>
#include <cpu/x86/msr.h>
void pch_enable_lpc(void)
diff --git a/src/mainboard/lenovo/x230/romstage.c b/src/mainboard/lenovo/x230/romstage.c
index d0ff67e888..4c946411f3 100644
--- a/src/mainboard/lenovo/x230/romstage.c
+++ b/src/mainboard/lenovo/x230/romstage.c
@@ -29,8 +29,6 @@
#include <northbridge/intel/sandybridge/raminit_native.h>
#include <southbridge/intel/bd82x6x/pch.h>
#include <southbridge/intel/common/gpio.h>
-#include <arch/cpu.h>
-#include <cbfs.h>
void pch_enable_lpc(void)
{
diff --git a/src/mainboard/msi/ms7721/mptable.c b/src/mainboard/msi/ms7721/mptable.c
index a66900b68e..d97663d89e 100644
--- a/src/mainboard/msi/ms7721/mptable.c
+++ b/src/mainboard/msi/ms7721/mptable.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <arch/cpu.h>
#include <arch/io.h>
#include <arch/ioapic.h>
#include <arch/smp/mpspec.h>
@@ -23,7 +22,6 @@
#include <string.h>
#include <southbridge/amd/agesa/hudson/hudson.h>
-
u8 picr_data[] = {
0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x0A,0xF1,0x00,0x00,0x1F,0x1F,0x1F,0x1F,
0x09,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
diff --git a/src/mainboard/msi/ms9652_fam10/romstage.c b/src/mainboard/msi/ms9652_fam10/romstage.c
index 3d22439533..cd57c2c395 100644
--- a/src/mainboard/msi/ms9652_fam10/romstage.c
+++ b/src/mainboard/msi/ms9652_fam10/romstage.c
@@ -23,6 +23,7 @@
#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <arch/io.h>
+#include <arch/cpu.h>
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
#include <console/console.h>
diff --git a/src/mainboard/samsung/lumpy/romstage.c b/src/mainboard/samsung/lumpy/romstage.c
index 4d5b667c58..b95a990a8f 100644
--- a/src/mainboard/samsung/lumpy/romstage.c
+++ b/src/mainboard/samsung/lumpy/romstage.c
@@ -31,7 +31,6 @@
#include <northbridge/intel/sandybridge/raminit_native.h>
#include <southbridge/intel/bd82x6x/pch.h>
#include <southbridge/intel/common/gpio.h>
-#include <arch/cpu.h>
#include <halt.h>
#include "option_table.h"
#if IS_ENABLED(CONFIG_DRIVERS_UART_8250IO)
diff --git a/src/mainboard/samsung/stumpy/romstage.c b/src/mainboard/samsung/stumpy/romstage.c
index bb11761f1d..c47c6ff2b7 100644
--- a/src/mainboard/samsung/stumpy/romstage.c
+++ b/src/mainboard/samsung/stumpy/romstage.c
@@ -33,7 +33,6 @@
#include <northbridge/intel/sandybridge/raminit_native.h>
#include <southbridge/intel/bd82x6x/pch.h>
#include <southbridge/intel/common/gpio.h>
-#include <arch/cpu.h>
#include <halt.h>
#if IS_ENABLED(CONFIG_DRIVERS_UART_8250IO)
#include <superio/smsc/lpc47n207/lpc47n207.h>
diff --git a/src/mainboard/scaleway/tagada/acpi_tables.c b/src/mainboard/scaleway/tagada/acpi_tables.c
index 5e5b25b1c4..3d83d3cbd1 100644
--- a/src/mainboard/scaleway/tagada/acpi_tables.c
+++ b/src/mainboard/scaleway/tagada/acpi_tables.c
@@ -24,7 +24,6 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
-#include <cpu/cpu.h>
#include <cpu/x86/msr.h>
#include <soc/acpi.h>
diff --git a/src/mainboard/siemens/mc_tcu3/romstage.c b/src/mainboard/siemens/mc_tcu3/romstage.c
index ef07f7e4fc..2e7ec7a850 100644
--- a/src/mainboard/siemens/mc_tcu3/romstage.c
+++ b/src/mainboard/siemens/mc_tcu3/romstage.c
@@ -15,7 +15,6 @@
*/
#include <stddef.h>
-#include <arch/cpu.h>
#include <lib.h>
#include <arch/io.h>
#include <arch/cbfs.h>
diff --git a/src/mainboard/supermicro/h8dmr_fam10/romstage.c b/src/mainboard/supermicro/h8dmr_fam10/romstage.c
index 3fb3ca09a0..ec195bf640 100644
--- a/src/mainboard/supermicro/h8dmr_fam10/romstage.c
+++ b/src/mainboard/supermicro/h8dmr_fam10/romstage.c
@@ -23,6 +23,7 @@
#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <arch/io.h>
+#include <arch/cpu.h>
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
#include <console/console.h>
diff --git a/src/mainboard/supermicro/h8qme_fam10/romstage.c b/src/mainboard/supermicro/h8qme_fam10/romstage.c
index 5ea0f64571..c237712820 100644
--- a/src/mainboard/supermicro/h8qme_fam10/romstage.c
+++ b/src/mainboard/supermicro/h8qme_fam10/romstage.c
@@ -23,6 +23,7 @@
#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <arch/io.h>
+#include <arch/cpu.h>
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
#include <console/console.h>
diff --git a/src/mainboard/supermicro/h8scm_fam10/romstage.c b/src/mainboard/supermicro/h8scm_fam10/romstage.c
index 11da86ed68..254672ddda 100644
--- a/src/mainboard/supermicro/h8scm_fam10/romstage.c
+++ b/src/mainboard/supermicro/h8scm_fam10/romstage.c
@@ -25,6 +25,7 @@
#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <arch/io.h>
+#include <arch/cpu.h>
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
#include <console/console.h>
diff --git a/src/mainboard/tyan/s2912_fam10/romstage.c b/src/mainboard/tyan/s2912_fam10/romstage.c
index 99d58f8d06..bb360b74c7 100644
--- a/src/mainboard/tyan/s2912_fam10/romstage.c
+++ b/src/mainboard/tyan/s2912_fam10/romstage.c
@@ -23,6 +23,7 @@
#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <arch/io.h>
+#include <arch/cpu.h>
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
#include <console/console.h>
diff --git a/src/northbridge/amd/amdfam10/raminit_amdmct.c b/src/northbridge/amd/amdfam10/raminit_amdmct.c
index 2843b92212..3a2dcccfa2 100644
--- a/src/northbridge/amd/amdfam10/raminit_amdmct.c
+++ b/src/northbridge/amd/amdfam10/raminit_amdmct.c
@@ -18,6 +18,7 @@
#include <inttypes.h>
#include <arch/io.h>
#include <arch/acpi.h>
+#include <arch/cpu.h>
#include <device/pci.h>
#include <string.h>
#include <cbmem.h>
diff --git a/src/northbridge/amd/amdht/h3finit.c b/src/northbridge/amd/amdht/h3finit.c
index 8a85734ea9..ee1a4d4d30 100644
--- a/src/northbridge/amd/amdht/h3finit.c
+++ b/src/northbridge/amd/amdht/h3finit.c
@@ -27,6 +27,7 @@
#include "h3gtopo.h"
#include "AsPsNb.h"
+#include <arch/cpu.h>
#include <device/pci.h>
#include <console/console.h>
#include <cpu/x86/lapic_def.h>
@@ -36,7 +37,6 @@
#include <northbridge/amd/amdfam10/raminit.h>
#include <northbridge/amd/amdfam10/amdfam10.h>
-
/*----------------------------------------------------------------------------
* DEFINITIONS AND MACROS
*
diff --git a/src/northbridge/amd/amdht/h3ncmn.c b/src/northbridge/amd/amdht/h3ncmn.c
index 6542ae4df9..1294bb3da7 100644
--- a/src/northbridge/amd/amdht/h3ncmn.c
+++ b/src/northbridge/amd/amdht/h3ncmn.c
@@ -28,6 +28,7 @@
#include "h3ffeat.h"
#include "AsPsNb.h"
+#include <arch/cpu.h>
#include <device/pci.h>
#include <console/console.h>
#include <cpu/amd/msr.h>
@@ -36,7 +37,6 @@
#include <northbridge/amd/amdfam10/raminit.h>
#include <northbridge/amd/amdfam10/amdfam10.h>
-
/*----------------------------------------------------------------------------
* DEFINITIONS AND MACROS
*
diff --git a/src/northbridge/amd/amdht/ht_wrapper.c b/src/northbridge/amd/amdht/ht_wrapper.c
index 08ecb4d300..05b8d12fdc 100644
--- a/src/northbridge/amd/amdht/ht_wrapper.c
+++ b/src/northbridge/amd/amdht/ht_wrapper.c
@@ -14,6 +14,7 @@
* GNU General Public License for more details.
*/
+#include <arch/cpu.h>
#include <cpu/x86/msr.h>
#include <console/console.h>
#include "ht_wrapper.h"
diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mctardk5.c b/src/northbridge/amd/amdmct/mct_ddr3/mctardk5.c
index 45cd124cf3..2e5a5009d6 100644
--- a/src/northbridge/amd/amdmct/mct_ddr3/mctardk5.c
+++ b/src/northbridge/amd/amdmct/mct_ddr3/mctardk5.c
@@ -16,6 +16,7 @@
/* AM3/ASB2/C32/G34 DDR3 */
+#include <arch/cpu.h>
#include <inttypes.h>
#include "mct_d.h"
#include "mct_d_gcc.h"
diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mctdqs_d.c b/src/northbridge/amd/amdmct/mct_ddr3/mctdqs_d.c
index 7920e656f5..34b13ea306 100644
--- a/src/northbridge/amd/amdmct/mct_ddr3/mctdqs_d.c
+++ b/src/northbridge/amd/amdmct/mct_ddr3/mctdqs_d.c
@@ -17,6 +17,7 @@
#include <inttypes.h>
#include <console/console.h>
#include <string.h>
+#include <arch/cpu.h>
#include <cpu/amd/msr.h>
#include <cpu/amd/mtrr.h>
#include "mct_d.h"
diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mctecc_d.c b/src/northbridge/amd/amdmct/mct_ddr3/mctecc_d.c
index 20a636e480..570838b6bc 100644
--- a/src/northbridge/amd/amdmct/mct_ddr3/mctecc_d.c
+++ b/src/northbridge/amd/amdmct/mct_ddr3/mctecc_d.c
@@ -14,6 +14,7 @@
* GNU General Public License for more details.
*/
+#include <arch/cpu.h>
#include <inttypes.h>
#include <console/console.h>
#include <string.h>
diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mcthwl.c b/src/northbridge/amd/amdmct/mct_ddr3/mcthwl.c
index 4fe5ad3d63..57f0e96581 100644
--- a/src/northbridge/amd/amdmct/mct_ddr3/mcthwl.c
+++ b/src/northbridge/amd/amdmct/mct_ddr3/mcthwl.c
@@ -14,6 +14,7 @@
* GNU General Public License for more details.
*/
+#include <arch/cpu.h>
#include <inttypes.h>
#include <console/console.h>
#include <string.h>
diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mctrci.c b/src/northbridge/amd/amdmct/mct_ddr3/mctrci.c
index 4ef6132584..d299f56a0d 100644
--- a/src/northbridge/amd/amdmct/mct_ddr3/mctrci.c
+++ b/src/northbridge/amd/amdmct/mct_ddr3/mctrci.c
@@ -14,6 +14,7 @@
* GNU General Public License for more details.
*/
+#include <arch/cpu.h>
#include <inttypes.h>
#include <console/console.h>
#include <string.h>
diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mctsdi.c b/src/northbridge/amd/amdmct/mct_ddr3/mctsdi.c
index 1fa0c96620..3ca1a98abb 100644
--- a/src/northbridge/amd/amdmct/mct_ddr3/mctsdi.c
+++ b/src/northbridge/amd/amdmct/mct_ddr3/mctsdi.c
@@ -14,6 +14,7 @@
* GNU General Public License for more details.
*/
+#include <arch/cpu.h>
#include <inttypes.h>
#include <console/console.h>
#include <string.h>
diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c b/src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c
index 42627e8445..a6faf90e0c 100644
--- a/src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c
+++ b/src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c
@@ -19,6 +19,7 @@
Description: Receiver En and DQS Timing Training feature for DDR 3 MCT
******************************************************************************/
+#include <arch/cpu.h>
#include <inttypes.h>
#include <console/console.h>
#include <string.h>
diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mctsrc1p.c b/src/northbridge/amd/amdmct/mct_ddr3/mctsrc1p.c
index 2592eedab9..0047b55356 100644
--- a/src/northbridge/amd/amdmct/mct_ddr3/mctsrc1p.c
+++ b/src/northbridge/amd/amdmct/mct_ddr3/mctsrc1p.c
@@ -14,6 +14,7 @@
* GNU General Public License for more details.
*/
+#include <arch/cpu.h>
#include <inttypes.h>
#include <console/console.h>
#include <string.h>
diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mctwl.c b/src/northbridge/amd/amdmct/mct_ddr3/mctwl.c
index 53c4a2dbe9..a91fb08bdc 100644
--- a/src/northbridge/amd/amdmct/mct_ddr3/mctwl.c
+++ b/src/northbridge/amd/amdmct/mct_ddr3/mctwl.c
@@ -14,6 +14,7 @@
* GNU General Public License for more details.
*/
+#include <arch/cpu.h>
#include <inttypes.h>
#include <console/console.h>
#include <string.h>
diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mutilc_d.c b/src/northbridge/amd/amdmct/mct_ddr3/mutilc_d.c
index f17e4d6758..eb36c67d97 100644
--- a/src/northbridge/amd/amdmct/mct_ddr3/mutilc_d.c
+++ b/src/northbridge/amd/amdmct/mct_ddr3/mutilc_d.c
@@ -15,6 +15,8 @@
*/
/* This file contains functions for common utility functions */
+
+#include <arch/cpu.h>
#include <inttypes.h>
#include <console/console.h>
#include <string.h>
diff --git a/src/northbridge/amd/amdmct/wrappers/mcti_d.c b/src/northbridge/amd/amdmct/wrappers/mcti_d.c
index bcf3ddc7fd..b7d24764ed 100644
--- a/src/northbridge/amd/amdmct/wrappers/mcti_d.c
+++ b/src/northbridge/amd/amdmct/wrappers/mcti_d.c
@@ -15,6 +15,8 @@
*/
/* Call-backs */
+
+#include <arch/cpu.h>
#include <delay.h>
#include <cpu/amd/msr.h>
#include <console/console.h>
diff --git a/src/northbridge/intel/e7505/raminit.c b/src/northbridge/intel/e7505/raminit.c
index 5dcc1faf85..eadd5bca8a 100644
--- a/src/northbridge/intel/e7505/raminit.c
+++ b/src/northbridge/intel/e7505/raminit.c
@@ -27,7 +27,6 @@
#include <stdint.h>
#include <device/pci_def.h>
#include <arch/io.h>
-#include <arch/cpu.h>
#include <lib.h>
#include <stdlib.h>
#include <commonlib/helpers.h>
diff --git a/src/northbridge/intel/gm45/acpi.c b/src/northbridge/intel/gm45/acpi.c
index d208eed4ab..18f541f13c 100644
--- a/src/northbridge/intel/gm45/acpi.c
+++ b/src/northbridge/intel/gm45/acpi.c
@@ -24,7 +24,6 @@
#include <device/pci_ids.h>
#include <cbmem.h>
#include <arch/acpigen.h>
-#include <cpu/cpu.h>
#include "gm45.h"
unsigned long acpi_fill_mcfg(unsigned long current)
diff --git a/src/northbridge/intel/haswell/northbridge.c b/src/northbridge/intel/haswell/northbridge.c
index 2b9e1553d3..0ca071b9ce 100644
--- a/src/northbridge/intel/haswell/northbridge.c
+++ b/src/northbridge/intel/haswell/northbridge.c
@@ -25,7 +25,6 @@
#include <device/pci_ids.h>
#include <stdlib.h>
#include <string.h>
-#include <cpu/cpu.h>
#include <cpu/x86/smm.h>
#include <boot/tables.h>
#include <cbmem.h>
diff --git a/src/northbridge/intel/i945/acpi.c b/src/northbridge/intel/i945/acpi.c
index 990d3de388..f842508917 100644
--- a/src/northbridge/intel/i945/acpi.c
+++ b/src/northbridge/intel/i945/acpi.c
@@ -24,7 +24,6 @@
#include <device/pci_ids.h>
#include <cbmem.h>
#include <arch/acpigen.h>
-#include <cpu/cpu.h>
#include "i945.h"
unsigned long acpi_fill_mcfg(unsigned long current)
diff --git a/src/northbridge/intel/nehalem/raminit.c b/src/northbridge/intel/nehalem/raminit.c
index 3160039092..ee5a60b5e7 100644
--- a/src/northbridge/intel/nehalem/raminit.c
+++ b/src/northbridge/intel/nehalem/raminit.c
@@ -26,7 +26,6 @@
#include <pc80/mc146818rtc.h>
#include <device/pci_def.h>
#include <device/device.h>
-#include <arch/cpu.h>
#include <halt.h>
#include <spd.h>
#include "raminit.h"
diff --git a/src/northbridge/intel/x4x/acpi.c b/src/northbridge/intel/x4x/acpi.c
index 678486c8a5..b168ffae65 100644
--- a/src/northbridge/intel/x4x/acpi.c
+++ b/src/northbridge/intel/x4x/acpi.c
@@ -25,7 +25,6 @@
#include <device/pci_ids.h>
#include <cbmem.h>
#include <arch/acpigen.h>
-#include <cpu/cpu.h>
#include "x4x.h"
unsigned long acpi_fill_mcfg(unsigned long current)
diff --git a/src/northbridge/intel/x4x/raminit.c b/src/northbridge/intel/x4x/raminit.c
index ff1f970e2e..ce5c2ebcf0 100644
--- a/src/northbridge/intel/x4x/raminit.c
+++ b/src/northbridge/intel/x4x/raminit.c
@@ -19,6 +19,7 @@
#include <console/console.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/mtrr.h>
+#include <arch/cpu.h>
#include <delay.h>
#include <halt.h>
#include <lib.h>
diff --git a/src/northbridge/intel/x4x/raminit_ddr23.c b/src/northbridge/intel/x4x/raminit_ddr23.c
index a94e9ca31c..4e5c0ce923 100644
--- a/src/northbridge/intel/x4x/raminit_ddr23.c
+++ b/src/northbridge/intel/x4x/raminit_ddr23.c
@@ -17,7 +17,6 @@
#include <assert.h>
#include <stdint.h>
#include <arch/io.h>
-#include <arch/cpu.h>
#include <console/console.h>
#include <commonlib/helpers.h>
#include <delay.h>
diff --git a/src/soc/amd/stoneyridge/chip.c b/src/soc/amd/stoneyridge/chip.c
index ef65887ba4..90b25bbfe9 100644
--- a/src/soc/amd/stoneyridge/chip.c
+++ b/src/soc/amd/stoneyridge/chip.c
@@ -17,7 +17,6 @@
#include <bootstate.h>
#include <console/console.h>
#include <cpu/amd/mtrr.h>
-#include <cpu/cpu.h>
#include <device/device.h>
#include <device/pci.h>
#include <drivers/i2c/designware/dw_i2c.h>
diff --git a/src/soc/amd/stoneyridge/northbridge.c b/src/soc/amd/stoneyridge/northbridge.c
index b57113bed8..e95e8ec181 100644
--- a/src/soc/amd/stoneyridge/northbridge.c
+++ b/src/soc/amd/stoneyridge/northbridge.c
@@ -22,7 +22,6 @@
#include <chip.h>
#include <console/console.h>
#include <cpu/amd/mtrr.h>
-#include <cpu/cpu.h>
#include <cpu/x86/lapic_def.h>
#include <cpu/x86/msr.h>
#include <cpu/amd/msr.h>
diff --git a/src/soc/amd/stoneyridge/smi.c b/src/soc/amd/stoneyridge/smi.c
index d21c70e6e5..5ddc0dda62 100644
--- a/src/soc/amd/stoneyridge/smi.c
+++ b/src/soc/amd/stoneyridge/smi.c
@@ -19,7 +19,6 @@
*/
#include <console/console.h>
-#include <cpu/cpu.h>
#include <soc/southbridge.h>
#include <soc/smi.h>
diff --git a/src/soc/cavium/cn81xx/soc.c b/src/soc/cavium/cn81xx/soc.c
index 0bf76f7424..8d42d3d931 100644
--- a/src/soc/cavium/cn81xx/soc.c
+++ b/src/soc/cavium/cn81xx/soc.c
@@ -18,7 +18,6 @@
#include <bootmode.h>
#include <console/console.h>
-#include <cpu/cpu.h>
#include <device/device.h>
#include <soc/addressmap.h>
#include <soc/clock.h>
diff --git a/src/soc/intel/apollolake/acpi.c b/src/soc/intel/apollolake/acpi.c
index d796fa0dcf..0c4ff81e82 100644
--- a/src/soc/intel/apollolake/acpi.c
+++ b/src/soc/intel/apollolake/acpi.c
@@ -22,7 +22,6 @@
#include <arch/smp/mpspec.h>
#include <cbmem.h>
#include <cpu/x86/smm.h>
-#include <cpu/cpu.h>
#include <gpio.h>
#include <intelblocks/acpi.h>
#include <intelblocks/pmclib.h>
diff --git a/src/soc/intel/apollolake/bootblock/bootblock.c b/src/soc/intel/apollolake/bootblock/bootblock.c
index bc5c1709fc..ac3e0cc0ea 100644
--- a/src/soc/intel/apollolake/bootblock/bootblock.c
+++ b/src/soc/intel/apollolake/bootblock/bootblock.c
@@ -14,7 +14,7 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
-#include <arch/cpu.h>
+
#include <bootblock_common.h>
#include <cpu/x86/pae.h>
#include <device/pci.h>
diff --git a/src/soc/intel/apollolake/car.c b/src/soc/intel/apollolake/car.c
index 920580d0a1..9f75c7e15c 100644
--- a/src/soc/intel/apollolake/car.c
+++ b/src/soc/intel/apollolake/car.c
@@ -15,7 +15,6 @@
* GNU General Public License for more details.
*/
-#include <arch/cpu.h>
#include <assert.h>
#include <cpu/x86/msr.h>
#include <intelblocks/msr.h>
diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index e70bfa3b2c..48a509dfb4 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -21,7 +21,6 @@
#include <bootstate.h>
#include <cbmem.h>
#include <console/console.h>
-#include <cpu/cpu.h>
#include <cpu/x86/mp.h>
#include <cpu/x86/msr.h>
#include <device/device.h>
diff --git a/src/soc/intel/apollolake/include/soc/romstage.h b/src/soc/intel/apollolake/include/soc/romstage.h
index fe3add6eee..da30de54e5 100644
--- a/src/soc/intel/apollolake/include/soc/romstage.h
+++ b/src/soc/intel/apollolake/include/soc/romstage.h
@@ -18,7 +18,6 @@
#ifndef _SOC_APOLLOLAKE_ROMSTAGE_H_
#define _SOC_APOLLOLAKE_ROMSTAGE_H_
-#include <arch/cpu.h>
#include <fsp/api.h>
void set_max_freq(void);
diff --git a/src/soc/intel/baytrail/acpi.c b/src/soc/intel/baytrail/acpi.c
index cdf3abfed5..336ff69661 100644
--- a/src/soc/intel/baytrail/acpi.c
+++ b/src/soc/intel/baytrail/acpi.c
@@ -24,7 +24,6 @@
#include <console/console.h>
#include <types.h>
#include <string.h>
-#include <arch/cpu.h>
#include <cpu/x86/msr.h>
#include <cpu/x86/tsc.h>
#include <cpu/intel/turbo.h>
diff --git a/src/soc/intel/baytrail/placeholders.c b/src/soc/intel/baytrail/placeholders.c
index b110f5f416..b476409fc4 100644
--- a/src/soc/intel/baytrail/placeholders.c
+++ b/src/soc/intel/baytrail/placeholders.c
@@ -13,7 +13,6 @@
*/
#include <arch/acpi.h>
-#include <cpu/cpu.h>
#include <device/pci_rom.h>
#include <soc/acpi.h>
diff --git a/src/soc/intel/baytrail/smm.c b/src/soc/intel/baytrail/smm.c
index 17541f684a..a65e10e55f 100644
--- a/src/soc/intel/baytrail/smm.c
+++ b/src/soc/intel/baytrail/smm.c
@@ -18,7 +18,6 @@
#include <device/pci.h>
#include <console/console.h>
#include <arch/io.h>
-#include <cpu/cpu.h>
#include <cpu/x86/smm.h>
#include <string.h>
diff --git a/src/soc/intel/baytrail/southcluster.c b/src/soc/intel/baytrail/southcluster.c
index 0ef70d020b..3946c15e5c 100644
--- a/src/soc/intel/baytrail/southcluster.c
+++ b/src/soc/intel/baytrail/southcluster.c
@@ -17,6 +17,7 @@
#include <stdint.h>
#include <arch/io.h>
#include <arch/acpi.h>
+#include <arch/cpu.h>
#include <bootstate.h>
#include <cbmem.h>
#include <console/console.h>
@@ -38,7 +39,6 @@
#include "chip.h"
#include <arch/acpi.h>
#include <arch/acpigen.h>
-#include <cpu/cpu.h>
static inline void
add_mmio_resource(struct device *dev, int i, unsigned long addr,
diff --git a/src/soc/intel/braswell/acpi.c b/src/soc/intel/braswell/acpi.c
index c11adb9d41..f402f54c66 100644
--- a/src/soc/intel/braswell/acpi.c
+++ b/src/soc/intel/braswell/acpi.c
@@ -23,7 +23,6 @@
#include <cbfs.h>
#include <cbmem.h>
#include <console/console.h>
-#include <cpu/cpu.h>
#include <cpu/intel/turbo.h>
#include <cpu/x86/msr.h>
#include <cpu/x86/smm.h>
diff --git a/src/soc/intel/braswell/include/soc/romstage.h b/src/soc/intel/braswell/include/soc/romstage.h
index fc4f864942..8fa9c8a713 100644
--- a/src/soc/intel/braswell/include/soc/romstage.h
+++ b/src/soc/intel/braswell/include/soc/romstage.h
@@ -18,7 +18,6 @@
#define _SOC_ROMSTAGE_H_
#include <stdint.h>
-#include <arch/cpu.h>
#include <fsp/romstage.h>
#include <fsp/util.h>
#include <soc/pei_data.h>
diff --git a/src/soc/intel/braswell/placeholders.c b/src/soc/intel/braswell/placeholders.c
index 8493e3821e..7e633d9b56 100644
--- a/src/soc/intel/braswell/placeholders.c
+++ b/src/soc/intel/braswell/placeholders.c
@@ -14,7 +14,6 @@
*/
#include <arch/acpi.h>
-#include <cpu/cpu.h>
#include <device/pci_rom.h>
#include <soc/acpi.h>
diff --git a/src/soc/intel/braswell/romstage/romstage.c b/src/soc/intel/braswell/romstage/romstage.c
index 03f9ac07f1..1cbb20bcfc 100644
--- a/src/soc/intel/braswell/romstage/romstage.c
+++ b/src/soc/intel/braswell/romstage/romstage.c
@@ -18,7 +18,6 @@
#include <cbmem.h>
#include <stddef.h>
#include <arch/early_variables.h>
-#include <arch/cpu.h>
#include <arch/io.h>
#include <arch/cbfs.h>
#include <arch/stages.h>
diff --git a/src/soc/intel/braswell/smm.c b/src/soc/intel/braswell/smm.c
index 3a7ab1cb69..ae0d80a8d0 100644
--- a/src/soc/intel/braswell/smm.c
+++ b/src/soc/intel/braswell/smm.c
@@ -17,7 +17,6 @@
#include <arch/io.h>
#include <console/console.h>
-#include <cpu/cpu.h>
#include <cpu/x86/smm.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/soc/intel/broadwell/bootblock/cpu.c b/src/soc/intel/broadwell/bootblock/cpu.c
index 133b1a40d7..7508bc2279 100644
--- a/src/soc/intel/broadwell/bootblock/cpu.c
+++ b/src/soc/intel/broadwell/bootblock/cpu.c
@@ -14,7 +14,6 @@
*/
#include <stdint.h>
-#include <arch/cpu.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/msr.h>
#include <cpu/x86/mtrr.h>
diff --git a/src/soc/intel/broadwell/cpu_info.c b/src/soc/intel/broadwell/cpu_info.c
index d89c83ee3f..bb438ed51f 100644
--- a/src/soc/intel/broadwell/cpu_info.c
+++ b/src/soc/intel/broadwell/cpu_info.c
@@ -15,7 +15,7 @@
*/
#include <console/console.h>
-#include <cpu/cpu.h>
+#include <arch/cpu.h>
#include <cpu/x86/msr.h>
#include <soc/cpu.h>
#include <soc/msr.h>
diff --git a/src/soc/intel/broadwell/include/soc/cpu.h b/src/soc/intel/broadwell/include/soc/cpu.h
index 4755ba424e..8b0855227c 100644
--- a/src/soc/intel/broadwell/include/soc/cpu.h
+++ b/src/soc/intel/broadwell/include/soc/cpu.h
@@ -16,7 +16,6 @@
#ifndef _BROADWELL_CPU_H_
#define _BROADWELL_CPU_H_
-#include <arch/cpu.h>
#include <device/device.h>
/* CPU types */
diff --git a/src/soc/intel/broadwell/lpc.c b/src/soc/intel/broadwell/lpc.c
index ff7ff81014..8219d5455b 100644
--- a/src/soc/intel/broadwell/lpc.c
+++ b/src/soc/intel/broadwell/lpc.c
@@ -22,6 +22,7 @@
#include <pc80/mc146818rtc.h>
#include <pc80/isa-dma.h>
#include <pc80/i8259.h>
+#include <arch/cpu.h>
#include <arch/io.h>
#include <arch/ioapic.h>
#include <arch/acpi.h>
diff --git a/src/soc/intel/broadwell/romstage/romstage.c b/src/soc/intel/broadwell/romstage/romstage.c
index 3abc853975..cc8bf5d69c 100644
--- a/src/soc/intel/broadwell/romstage/romstage.c
+++ b/src/soc/intel/broadwell/romstage/romstage.c
@@ -15,7 +15,6 @@
#include <stddef.h>
#include <stdint.h>
-#include <arch/cpu.h>
#include <arch/io.h>
#include <arch/cbfs.h>
#include <arch/early_variables.h>
diff --git a/src/soc/intel/broadwell/smi.c b/src/soc/intel/broadwell/smi.c
index c159a759bf..f87b8a2afc 100644
--- a/src/soc/intel/broadwell/smi.c
+++ b/src/soc/intel/broadwell/smi.c
@@ -18,7 +18,6 @@
#include <device/pci.h>
#include <console/console.h>
#include <arch/io.h>
-#include <cpu/cpu.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/smm.h>
#include <string.h>
diff --git a/src/soc/intel/broadwell/smmrelocate.c b/src/soc/intel/broadwell/smmrelocate.c
index 08b98e9de1..5e95bb4693 100644
--- a/src/soc/intel/broadwell/smmrelocate.c
+++ b/src/soc/intel/broadwell/smmrelocate.c
@@ -17,7 +17,6 @@
#include <string.h>
#include <device/device.h>
#include <device/pci.h>
-#include <cpu/cpu.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/lapic.h>
#include <cpu/x86/mp.h>
diff --git a/src/soc/intel/cannonlake/acpi.c b/src/soc/intel/cannonlake/acpi.c
index 4fd92415af..84dfdad286 100644
--- a/src/soc/intel/cannonlake/acpi.c
+++ b/src/soc/intel/cannonlake/acpi.c
@@ -17,12 +17,10 @@
#include <arch/acpi.h>
#include <arch/acpigen.h>
-#include <arch/cpu.h>
#include <arch/io.h>
#include <arch/smp/mpspec.h>
#include <cbmem.h>
#include <chip.h>
-#include <cpu/cpu.h>
#include <ec/google/chromeec/ec.h>
#include <intelblocks/cpulib.h>
#include <intelblocks/pmclib.h>
diff --git a/src/soc/intel/cannonlake/include/soc/cpu.h b/src/soc/intel/cannonlake/include/soc/cpu.h
index 1e3e2b4cb1..0e027d3456 100644
--- a/src/soc/intel/cannonlake/include/soc/cpu.h
+++ b/src/soc/intel/cannonlake/include/soc/cpu.h
@@ -17,7 +17,6 @@
#ifndef _SOC_CANNONLAKE_CPU_H_
#define _SOC_CANNONLAKE_CPU_H_
-#include <arch/cpu.h>
#include <device/device.h>
#include <intelblocks/msr.h>
diff --git a/src/soc/intel/cannonlake/include/soc/romstage.h b/src/soc/intel/cannonlake/include/soc/romstage.h
index 9ea60ae93e..a58ace59a5 100644
--- a/src/soc/intel/cannonlake/include/soc/romstage.h
+++ b/src/soc/intel/cannonlake/include/soc/romstage.h
@@ -17,7 +17,6 @@
#ifndef _SOC_ROMSTAGE_H_
#define _SOC_ROMSTAGE_H_
-#include <arch/cpu.h>
#include <fsp/api.h>
void mainboard_memory_init_params(FSPM_UPD *mupd);
diff --git a/src/soc/intel/common/block/cpu/cpulib.c b/src/soc/intel/common/block/cpu/cpulib.c
index ebbdabd3e8..62b70be98e 100644
--- a/src/soc/intel/common/block/cpu/cpulib.c
+++ b/src/soc/intel/common/block/cpu/cpulib.c
@@ -20,6 +20,7 @@
#include <cpu/intel/turbo.h>
#include <cpu/x86/msr.h>
#include <cpu/x86/mtrr.h>
+#include <arch/cpu.h>
#include <delay.h>
#include <intelblocks/cpulib.h>
#include <intelblocks/fast_spi.h>
diff --git a/src/soc/intel/common/util.c b/src/soc/intel/common/util.c
index 3aadd6b54e..fadef607c3 100644
--- a/src/soc/intel/common/util.c
+++ b/src/soc/intel/common/util.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <arch/cpu.h>
#include <console/console.h>
#include <cpu/cpu.h>
#include <cpu/x86/mtrr.h>
diff --git a/src/soc/intel/denverton_ns/acpi.c b/src/soc/intel/denverton_ns/acpi.c
index 71e396004f..a75a182fd7 100644
--- a/src/soc/intel/denverton_ns/acpi.c
+++ b/src/soc/intel/denverton_ns/acpi.c
@@ -18,11 +18,11 @@
#include <arch/acpi.h>
#include <arch/acpigen.h>
+#include <arch/cpu.h>
#include <arch/smp/mpspec.h>
#include <cpu/x86/smm.h>
#include <string.h>
#include <device/pci.h>
-#include <cpu/cpu.h>
#include <cbmem.h>
#include <soc/acpi.h>
diff --git a/src/soc/intel/denverton_ns/bootblock/bootblock.c b/src/soc/intel/denverton_ns/bootblock/bootblock.c
index 8b0c356aa0..7325ecb571 100644
--- a/src/soc/intel/denverton_ns/bootblock/bootblock.c
+++ b/src/soc/intel/denverton_ns/bootblock/bootblock.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/cpu.h>
#include <bootblock_common.h>
#include <cpu/x86/mtrr.h>
#include <device/pci.h>
diff --git a/src/soc/intel/denverton_ns/chip.c b/src/soc/intel/denverton_ns/chip.c
index 05dcb76bd3..dfb6d2ee74 100644
--- a/src/soc/intel/denverton_ns/chip.c
+++ b/src/soc/intel/denverton_ns/chip.c
@@ -20,7 +20,6 @@
#include <cbfs.h>
#include <cbmem.h>
#include <console/console.h>
-#include <cpu/cpu.h>
#include <device/device.h>
#include <device/pci.h>
#include <fsp/api.h>
diff --git a/src/soc/intel/denverton_ns/include/soc/romstage.h b/src/soc/intel/denverton_ns/include/soc/romstage.h
index 2c6c5ce890..6ec7cbedc4 100644
--- a/src/soc/intel/denverton_ns/include/soc/romstage.h
+++ b/src/soc/intel/denverton_ns/include/soc/romstage.h
@@ -18,7 +18,6 @@
#ifndef _SOC_DENVERTON_NS_ROMSTAGE_H_
#define _SOC_DENVERTON_NS_ROMSTAGE_H_
-#include <arch/cpu.h>
#include <fsp/api.h>
/* These functions are weak and can be overridden by a mainboard functions. */
diff --git a/src/soc/intel/denverton_ns/lpc.c b/src/soc/intel/denverton_ns/lpc.c
index 0e1a95de45..dbc5eccf96 100644
--- a/src/soc/intel/denverton_ns/lpc.c
+++ b/src/soc/intel/denverton_ns/lpc.c
@@ -21,7 +21,6 @@
#include <arch/io.h>
#include <arch/ioapic.h>
#include <arch/acpi.h>
-#include <cpu/cpu.h>
#include <cpu/x86/smm.h>
#include <bootstate.h>
diff --git a/src/soc/intel/denverton_ns/smm.c b/src/soc/intel/denverton_ns/smm.c
index 732aed4326..9d3fa75a6a 100644
--- a/src/soc/intel/denverton_ns/smm.c
+++ b/src/soc/intel/denverton_ns/smm.c
@@ -20,7 +20,6 @@
#include <device/pci.h>
#include <console/console.h>
#include <arch/io.h>
-#include <cpu/cpu.h>
#include <cpu/x86/smm.h>
#include <string.h>
diff --git a/src/soc/intel/denverton_ns/tsc_freq.c b/src/soc/intel/denverton_ns/tsc_freq.c
index 6bf2a48d13..0e268b3780 100644
--- a/src/soc/intel/denverton_ns/tsc_freq.c
+++ b/src/soc/intel/denverton_ns/tsc_freq.c
@@ -17,7 +17,6 @@
#include <cpu/x86/msr.h>
#include <cpu/x86/tsc.h>
-#include <arch/cpu.h>
#include <soc/cpu.h>
#include <soc/msr.h>
diff --git a/src/soc/intel/denverton_ns/upd_display.c b/src/soc/intel/denverton_ns/upd_display.c
index 076ffec8d7..4f4e1bfcf9 100644
--- a/src/soc/intel/denverton_ns/upd_display.c
+++ b/src/soc/intel/denverton_ns/upd_display.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/cpu.h>
#include <console/console.h>
#include <fsp/util.h>
#include <lib.h>
diff --git a/src/soc/intel/fsp_baytrail/acpi.c b/src/soc/intel/fsp_baytrail/acpi.c
index 97c8d5b46f..8152bfb5fc 100644
--- a/src/soc/intel/fsp_baytrail/acpi.c
+++ b/src/soc/intel/fsp_baytrail/acpi.c
@@ -43,7 +43,6 @@
#include <soc/msr.h>
#include <soc/pattrs.h>
#include <soc/pmc.h>
-#include <cpu/cpu.h>
#include <cbmem.h>
#include "chip.h"
diff --git a/src/soc/intel/fsp_baytrail/include/soc/romstage.h b/src/soc/intel/fsp_baytrail/include/soc/romstage.h
index a3fdb7b40a..ce66df8a6a 100644
--- a/src/soc/intel/fsp_baytrail/include/soc/romstage.h
+++ b/src/soc/intel/fsp_baytrail/include/soc/romstage.h
@@ -24,7 +24,6 @@
void report_platform_info(void);
#include <stdint.h>
-#include <arch/cpu.h>
#include <drivers/intel/fsp1_0/fsp_util.h>
void main(FSP_INFO_HEADER *fsp_info_header);
diff --git a/src/soc/intel/fsp_baytrail/placeholders.c b/src/soc/intel/fsp_baytrail/placeholders.c
index 587f0e9e62..e9a8757557 100644
--- a/src/soc/intel/fsp_baytrail/placeholders.c
+++ b/src/soc/intel/fsp_baytrail/placeholders.c
@@ -13,7 +13,6 @@
*/
#include <arch/acpi.h>
-#include <cpu/cpu.h>
#include <device/pci_rom.h>
#include <soc/acpi.h>
diff --git a/src/soc/intel/fsp_baytrail/romstage/romstage.c b/src/soc/intel/fsp_baytrail/romstage/romstage.c
index fb5962e59c..bc49a418f4 100644
--- a/src/soc/intel/fsp_baytrail/romstage/romstage.c
+++ b/src/soc/intel/fsp_baytrail/romstage/romstage.c
@@ -15,7 +15,6 @@
*/
#include <stddef.h>
-#include <arch/cpu.h>
#include <lib.h>
#include <arch/io.h>
#include <arch/cbfs.h>
diff --git a/src/soc/intel/fsp_baytrail/smm.c b/src/soc/intel/fsp_baytrail/smm.c
index eb24d219fa..84f8d28d6d 100644
--- a/src/soc/intel/fsp_baytrail/smm.c
+++ b/src/soc/intel/fsp_baytrail/smm.c
@@ -18,7 +18,6 @@
#include <device/pci.h>
#include <console/console.h>
#include <arch/io.h>
-#include <cpu/cpu.h>
#include <cpu/x86/smm.h>
#include <string.h>
diff --git a/src/soc/intel/fsp_baytrail/southcluster.c b/src/soc/intel/fsp_baytrail/southcluster.c
index 6fa2192c52..d62805ff7a 100644
--- a/src/soc/intel/fsp_baytrail/southcluster.c
+++ b/src/soc/intel/fsp_baytrail/southcluster.c
@@ -42,7 +42,6 @@
#include "chip.h"
#include <arch/acpi.h>
#include <arch/acpigen.h>
-#include <cpu/cpu.h>
#define ENABLE_ACPI_MODE_IN_COREBOOT 0
#define TEST_SMM_FLASH_LOCKDOWN 0
diff --git a/src/soc/intel/fsp_broadwell_de/acpi.c b/src/soc/intel/fsp_broadwell_de/acpi.c
index 9c3cae08ac..15ea5eccea 100644
--- a/src/soc/intel/fsp_broadwell_de/acpi.c
+++ b/src/soc/intel/fsp_broadwell_de/acpi.c
@@ -19,7 +19,6 @@
#include <string.h>
#include <types.h>
#include <arch/acpigen.h>
-#include <arch/cpu.h>
#include <arch/io.h>
#include <arch/smp/mpspec.h>
#include <console/console.h>
diff --git a/src/soc/intel/fsp_broadwell_de/include/soc/romstage.h b/src/soc/intel/fsp_broadwell_de/include/soc/romstage.h
index 94a5a5669c..877b0a0b70 100644
--- a/src/soc/intel/fsp_broadwell_de/include/soc/romstage.h
+++ b/src/soc/intel/fsp_broadwell_de/include/soc/romstage.h
@@ -22,7 +22,6 @@
#endif
#include <stdint.h>
-#include <arch/cpu.h>
#include <fsp.h>
void romstage_main_continue(EFI_STATUS status, void *hob_list_ptr);
diff --git a/src/soc/intel/fsp_broadwell_de/romstage/romstage.c b/src/soc/intel/fsp_broadwell_de/romstage/romstage.c
index 0f53a79732..801f9e0e5e 100644
--- a/src/soc/intel/fsp_broadwell_de/romstage/romstage.c
+++ b/src/soc/intel/fsp_broadwell_de/romstage/romstage.c
@@ -16,7 +16,6 @@
*/
#include <stddef.h>
-#include <arch/cpu.h>
#include <lib.h>
#include <arch/io.h>
#include <arch/cbfs.h>
diff --git a/src/soc/intel/fsp_broadwell_de/smmrelocate.c b/src/soc/intel/fsp_broadwell_de/smmrelocate.c
index fe7bc6f1ac..c8a9e004f1 100644
--- a/src/soc/intel/fsp_broadwell_de/smmrelocate.c
+++ b/src/soc/intel/fsp_broadwell_de/smmrelocate.c
@@ -19,7 +19,6 @@
#include <types.h>
#include <string.h>
#include <device/pci.h>
-#include <cpu/cpu.h>
#include <cpu/x86/lapic.h>
#include <cpu/x86/mp.h>
#include <cpu/x86/mtrr.h>
diff --git a/src/soc/intel/icelake/acpi.c b/src/soc/intel/icelake/acpi.c
index be024fe5c5..39ec58a954 100644
--- a/src/soc/intel/icelake/acpi.c
+++ b/src/soc/intel/icelake/acpi.c
@@ -15,12 +15,10 @@
#include <arch/acpi.h>
#include <arch/acpigen.h>
-#include <arch/cpu.h>
#include <arch/io.h>
#include <arch/smp/mpspec.h>
#include <cbmem.h>
#include <chip.h>
-#include <cpu/cpu.h>
#include <ec/google/chromeec/ec.h>
#include <intelblocks/cpulib.h>
#include <intelblocks/pmclib.h>
diff --git a/src/soc/intel/icelake/include/soc/cpu.h b/src/soc/intel/icelake/include/soc/cpu.h
index 856d685890..1e8d9e86c4 100644
--- a/src/soc/intel/icelake/include/soc/cpu.h
+++ b/src/soc/intel/icelake/include/soc/cpu.h
@@ -16,7 +16,6 @@
#ifndef _SOC_ICELAKE_CPU_H_
#define _SOC_ICELAKE_CPU_H_
-#include <arch/cpu.h>
#include <device/device.h>
#include <intelblocks/msr.h>
diff --git a/src/soc/intel/icelake/include/soc/romstage.h b/src/soc/intel/icelake/include/soc/romstage.h
index 1517264d10..e931811302 100644
--- a/src/soc/intel/icelake/include/soc/romstage.h
+++ b/src/soc/intel/icelake/include/soc/romstage.h
@@ -16,7 +16,6 @@
#ifndef _SOC_ROMSTAGE_H_
#define _SOC_ROMSTAGE_H_
-#include <arch/cpu.h>
#include <fsp/api.h>
void mainboard_memory_init_params(FSPM_UPD *mupd);
diff --git a/src/soc/intel/quark/include/soc/cpu.h b/src/soc/intel/quark/include/soc/cpu.h
index 1f7bf2cbdb..238f37089d 100644
--- a/src/soc/intel/quark/include/soc/cpu.h
+++ b/src/soc/intel/quark/include/soc/cpu.h
@@ -16,7 +16,6 @@
#ifndef _QUARK_CPU_H_
#define _QUARK_CPU_H_
-#include <arch/cpu.h>
#include <device/device.h>
/* Supported CPUIDs */
diff --git a/src/soc/intel/skylake/acpi.c b/src/soc/intel/skylake/acpi.c
index 86dcc48e20..6687ea1fa7 100644
--- a/src/soc/intel/skylake/acpi.c
+++ b/src/soc/intel/skylake/acpi.c
@@ -24,7 +24,6 @@
#include <cbmem.h>
#include <chip.h>
#include <console/console.h>
-#include <cpu/cpu.h>
#include <cpu/x86/smm.h>
#include <cpu/x86/msr.h>
#include <cpu/x86/tsc.h>
diff --git a/src/soc/intel/skylake/cpu.c b/src/soc/intel/skylake/cpu.c
index cf039d5845..9e4bbe8d4c 100644
--- a/src/soc/intel/skylake/cpu.c
+++ b/src/soc/intel/skylake/cpu.c
@@ -22,7 +22,6 @@
#include <device/pci.h>
#include <string.h>
#include <chip.h>
-#include <cpu/cpu.h>
#include <cpu/x86/mtrr.h>
#include <cpu/x86/msr.h>
#include <cpu/x86/lapic.h>
diff --git a/src/soc/intel/skylake/include/fsp20/soc/romstage.h b/src/soc/intel/skylake/include/fsp20/soc/romstage.h
index cdcc8fbc28..364bf52529 100644
--- a/src/soc/intel/skylake/include/fsp20/soc/romstage.h
+++ b/src/soc/intel/skylake/include/fsp20/soc/romstage.h
@@ -17,7 +17,6 @@
#ifndef _SOC_ROMSTAGE_H_
#define _SOC_ROMSTAGE_H_
-#include <arch/cpu.h>
#include <fsp/api.h>
void mainboard_memory_init_params(FSPM_UPD *mupd);
diff --git a/src/soc/intel/skylake/include/soc/cpu.h b/src/soc/intel/skylake/include/soc/cpu.h
index cc76b19cd5..0681f78033 100644
--- a/src/soc/intel/skylake/include/soc/cpu.h
+++ b/src/soc/intel/skylake/include/soc/cpu.h
@@ -17,7 +17,6 @@
#ifndef _SOC_CPU_H_
#define _SOC_CPU_H_
-#include <arch/cpu.h>
#include <device/device.h>
/* CPU types */
diff --git a/src/soc/intel/skylake/romstage/romstage.c b/src/soc/intel/skylake/romstage/romstage.c
index 215b07c074..8710c5a662 100644
--- a/src/soc/intel/skylake/romstage/romstage.c
+++ b/src/soc/intel/skylake/romstage/romstage.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <arch/cpu.h>
#include <arch/io.h>
#include <arch/cbfs.h>
#include <arch/stages.h>
diff --git a/src/soc/intel/skylake/smmrelocate.c b/src/soc/intel/skylake/smmrelocate.c
index 3db60f9e31..cb4e23fc94 100644
--- a/src/soc/intel/skylake/smmrelocate.c
+++ b/src/soc/intel/skylake/smmrelocate.c
@@ -18,7 +18,6 @@
#include <string.h>
#include <device/device.h>
#include <device/pci.h>
-#include <cpu/cpu.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/lapic.h>
#include <cpu/x86/mp.h>
diff --git a/src/soc/mediatek/mt8173/soc.c b/src/soc/mediatek/mt8173/soc.c
index c28eb056ea..493ed51e8b 100644
--- a/src/soc/mediatek/mt8173/soc.c
+++ b/src/soc/mediatek/mt8173/soc.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <cpu/cpu.h>
#include <console/console.h>
#include <device/device.h>
#include <symbols.h>
diff --git a/src/soc/nvidia/tegra124/display.c b/src/soc/nvidia/tegra124/display.c
index c90e392e0e..ec3d537300 100644
--- a/src/soc/nvidia/tegra124/display.c
+++ b/src/soc/nvidia/tegra124/display.c
@@ -17,7 +17,6 @@
#include <boot/tables.h>
#include <cbmem.h>
#include <console/console.h>
-#include <cpu/cpu.h>
#include <delay.h>
#include <device/device.h>
#include <edid.h>
diff --git a/src/soc/nvidia/tegra210/ramstage.c b/src/soc/nvidia/tegra210/ramstage.c
index 86fae67c43..61e5341e09 100644
--- a/src/soc/nvidia/tegra210/ramstage.c
+++ b/src/soc/nvidia/tegra210/ramstage.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <arch/cpu.h>
#include <arch/lib_helpers.h>
#include <arch/stages.h>
#include <gic.h>
diff --git a/src/soc/nvidia/tegra210/soc.c b/src/soc/nvidia/tegra210/soc.c
index a8f111bdf9..076aa00553 100644
--- a/src/soc/nvidia/tegra210/soc.c
+++ b/src/soc/nvidia/tegra210/soc.c
@@ -16,7 +16,6 @@
#include <arch/io.h>
#include <arch/cache.h>
-#include <cpu/cpu.h>
#include <bootmode.h>
#include <bootstate.h>
#include <cbmem.h>
diff --git a/src/soc/nvidia/tegra210/sor.c b/src/soc/nvidia/tegra210/sor.c
index a00bdadec5..df5c449e42 100644
--- a/src/soc/nvidia/tegra210/sor.c
+++ b/src/soc/nvidia/tegra210/sor.c
@@ -26,7 +26,6 @@
#include <device/device.h>
#include <stdlib.h>
#include <string.h>
-#include <cpu/cpu.h>
#include <boot/tables.h>
#include <cbmem.h>
#include <soc/nvidia/tegra/dc.h>
diff --git a/src/soc/rockchip/rk3399/soc.c b/src/soc/rockchip/rk3399/soc.c
index 30f51d0ef5..45ccbb3ead 100644
--- a/src/soc/rockchip/rk3399/soc.c
+++ b/src/soc/rockchip/rk3399/soc.c
@@ -15,7 +15,6 @@
#include <bootmode.h>
#include <console/console.h>
-#include <cpu/cpu.h>
#include <device/device.h>
#include <soc/addressmap.h>
#include <soc/clock.h>
diff --git a/src/southbridge/amd/agesa/hudson/early_setup.c b/src/southbridge/amd/agesa/hudson/early_setup.c
index 75da9dd91e..66cd66ebe3 100644
--- a/src/southbridge/amd/agesa/hudson/early_setup.c
+++ b/src/southbridge/amd/agesa/hudson/early_setup.c
@@ -21,7 +21,6 @@
#include <arch/acpi.h>
#include <console/console.h>
#include <reset.h>
-#include <arch/cpu.h>
#include <cbmem.h>
#include "hudson.h"
diff --git a/src/southbridge/amd/agesa/hudson/smi.c b/src/southbridge/amd/agesa/hudson/smi.c
index e8b7868209..4180795a73 100644
--- a/src/southbridge/amd/agesa/hudson/smi.c
+++ b/src/southbridge/amd/agesa/hudson/smi.c
@@ -21,7 +21,6 @@
#include "smi.h"
#include <console/console.h>
-#include <cpu/cpu.h>
void smm_setup_structures(void *gnvs, void *tcg, void *smi1)
{
diff --git a/src/southbridge/amd/pi/hudson/early_setup.c b/src/southbridge/amd/pi/hudson/early_setup.c
index 2f22f04738..c38e6f8d69 100644
--- a/src/southbridge/amd/pi/hudson/early_setup.c
+++ b/src/southbridge/amd/pi/hudson/early_setup.c
@@ -22,7 +22,6 @@
#include <arch/acpi.h>
#include <console/console.h>
#include <reset.h>
-#include <arch/cpu.h>
#include <cbmem.h>
#include "hudson.h"
#include "pci_devs.h"
diff --git a/src/southbridge/amd/pi/hudson/smi.c b/src/southbridge/amd/pi/hudson/smi.c
index e8b7868209..4180795a73 100644
--- a/src/southbridge/amd/pi/hudson/smi.c
+++ b/src/southbridge/amd/pi/hudson/smi.c
@@ -21,7 +21,6 @@
#include "smi.h"
#include <console/console.h>
-#include <cpu/cpu.h>
void smm_setup_structures(void *gnvs, void *tcg, void *smi1)
{
diff --git a/src/southbridge/amd/rs780/cmn.c b/src/southbridge/amd/rs780/cmn.c
index b849e1efa7..23cd877370 100644
--- a/src/southbridge/amd/rs780/cmn.c
+++ b/src/southbridge/amd/rs780/cmn.c
@@ -14,9 +14,8 @@
*/
#include <console/console.h>
-
#include <arch/io.h>
-
+#include <arch/cpu.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
@@ -24,7 +23,6 @@
#include <cpu/x86/msr.h>
#include <cpu/amd/mtrr.h>
#include <delay.h>
-#include <cpu/cpu.h>
#include "rs780.h"
static u32 nb_read_index(struct device *dev, u32 index_reg, u32 index)
diff --git a/src/southbridge/amd/sb700/early_setup.c b/src/southbridge/amd/sb700/early_setup.c
index a6569210f4..70cf340c8e 100644
--- a/src/southbridge/amd/sb700/early_setup.c
+++ b/src/southbridge/amd/sb700/early_setup.c
@@ -19,7 +19,6 @@
#include <stdint.h>
#include <option.h>
-#include <arch/cpu.h>
#include <arch/io.h>
#include <console/console.h>
#include <cpu/x86/msr.h>
diff --git a/src/southbridge/amd/sb800/early_setup.c b/src/southbridge/amd/sb800/early_setup.c
index 6835d993c4..c9b879a931 100644
--- a/src/southbridge/amd/sb800/early_setup.c
+++ b/src/southbridge/amd/sb800/early_setup.c
@@ -17,7 +17,6 @@
#define _SB800_EARLY_SETUP_C_
#include <reset.h>
-#include <arch/cpu.h>
#include <southbridge/amd/common/amd_defs.h>
#include <southbridge/amd/common/reset.h>
#include "sb800.h"
diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c
index 67f1de6a07..f1f47d50cf 100644
--- a/src/southbridge/intel/bd82x6x/lpc.c
+++ b/src/southbridge/intel/bd82x6x/lpc.c
@@ -26,7 +26,7 @@
#include <arch/io.h>
#include <arch/ioapic.h>
#include <arch/acpi.h>
-#include <cpu/cpu.h>
+#include <arch/cpu.h>
#include <arch/acpigen.h>
#include <drivers/intel/gma/i915.h>
#include <cpu/x86/smm.h>
diff --git a/src/southbridge/intel/common/smi.c b/src/southbridge/intel/common/smi.c
index d8e6d43a18..3c2555680d 100644
--- a/src/southbridge/intel/common/smi.c
+++ b/src/southbridge/intel/common/smi.c
@@ -19,7 +19,6 @@
#include <device/pci.h>
#include <console/console.h>
#include <arch/io.h>
-#include <cpu/cpu.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/smm.h>
#include <cpu/intel/smm/gen1/smi.h>
diff --git a/src/southbridge/intel/fsp_bd82x6x/lpc.c b/src/southbridge/intel/fsp_bd82x6x/lpc.c
index 431587d426..bc9e06b917 100644
--- a/src/southbridge/intel/fsp_bd82x6x/lpc.c
+++ b/src/southbridge/intel/fsp_bd82x6x/lpc.c
@@ -25,7 +25,7 @@
#include <arch/io.h>
#include <arch/ioapic.h>
#include <arch/acpi.h>
-#include <cpu/cpu.h>
+#include <arch/cpu.h>
#include <elog.h>
#include <arch/acpigen.h>
#include <drivers/intel/gma/i915.h>
diff --git a/src/southbridge/intel/fsp_bd82x6x/smi.c b/src/southbridge/intel/fsp_bd82x6x/smi.c
index 22489040ae..35df35215e 100644
--- a/src/southbridge/intel/fsp_bd82x6x/smi.c
+++ b/src/southbridge/intel/fsp_bd82x6x/smi.c
@@ -19,7 +19,6 @@
#include <device/pci.h>
#include <console/console.h>
#include <arch/io.h>
-#include <cpu/cpu.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/smm.h>
#include <string.h>
diff --git a/src/southbridge/intel/fsp_i89xx/lpc.c b/src/southbridge/intel/fsp_i89xx/lpc.c
index f584f36a76..8019b02923 100644
--- a/src/southbridge/intel/fsp_i89xx/lpc.c
+++ b/src/southbridge/intel/fsp_i89xx/lpc.c
@@ -25,7 +25,7 @@
#include <arch/io.h>
#include <arch/ioapic.h>
#include <arch/acpi.h>
-#include <cpu/cpu.h>
+#include <arch/cpu.h>
#include <elog.h>
#include <arch/acpigen.h>
#include <drivers/intel/gma/i915.h>
diff --git a/src/southbridge/intel/fsp_i89xx/romstage.c b/src/southbridge/intel/fsp_i89xx/romstage.c
index 863ff6aefd..2f28884ee2 100644
--- a/src/southbridge/intel/fsp_i89xx/romstage.c
+++ b/src/southbridge/intel/fsp_i89xx/romstage.c
@@ -19,7 +19,6 @@
#include <string.h>
#include <lib.h>
#include <timestamp.h>
-#include <arch/cpu.h>
#include <arch/io.h>
#include <device/pci_def.h>
#include <device/pnp_def.h>
diff --git a/src/southbridge/intel/fsp_i89xx/romstage.h b/src/southbridge/intel/fsp_i89xx/romstage.h
index c026159af8..592dc6e621 100644
--- a/src/southbridge/intel/fsp_i89xx/romstage.h
+++ b/src/southbridge/intel/fsp_i89xx/romstage.h
@@ -21,7 +21,6 @@
#endif
#include <stdint.h>
-#include <arch/cpu.h>
void early_mainboard_romstage_entry(void);
void late_mainboard_romstage_entry(void);
diff --git a/src/southbridge/intel/fsp_i89xx/smi.c b/src/southbridge/intel/fsp_i89xx/smi.c
index 6dc58f0b8d..33dc5f8da4 100644
--- a/src/southbridge/intel/fsp_i89xx/smi.c
+++ b/src/southbridge/intel/fsp_i89xx/smi.c
@@ -19,7 +19,6 @@
#include <device/pci.h>
#include <console/console.h>
#include <arch/io.h>
-#include <cpu/cpu.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/smm.h>
#include <string.h>
diff --git a/src/southbridge/intel/fsp_rangeley/lpc.c b/src/southbridge/intel/fsp_rangeley/lpc.c
index 88cc73fa82..726fd3b9ef 100644
--- a/src/southbridge/intel/fsp_rangeley/lpc.c
+++ b/src/southbridge/intel/fsp_rangeley/lpc.c
@@ -25,7 +25,7 @@
#include <arch/io.h>
#include <arch/ioapic.h>
#include <arch/acpi.h>
-#include <cpu/cpu.h>
+#include <arch/cpu.h>
#include <elog.h>
#include <string.h>
#include <cbmem.h>
diff --git a/src/southbridge/intel/fsp_rangeley/romstage.c b/src/southbridge/intel/fsp_rangeley/romstage.c
index 2f598d88d5..270e7ce3db 100644
--- a/src/southbridge/intel/fsp_rangeley/romstage.c
+++ b/src/southbridge/intel/fsp_rangeley/romstage.c
@@ -31,7 +31,6 @@
#include "southbridge/intel/fsp_rangeley/soc.h"
#include "southbridge/intel/fsp_rangeley/gpio.h"
#include "southbridge/intel/fsp_rangeley/romstage.h"
-#include <arch/cpu.h>
#include <cpu/x86/msr.h>
#include "gpio.h"
diff --git a/src/southbridge/intel/fsp_rangeley/romstage.h b/src/southbridge/intel/fsp_rangeley/romstage.h
index 57f1899367..261357746f 100644
--- a/src/southbridge/intel/fsp_rangeley/romstage.h
+++ b/src/southbridge/intel/fsp_rangeley/romstage.h
@@ -22,7 +22,6 @@
#endif
#include <stdint.h>
-#include <arch/cpu.h>
#include <drivers/intel/fsp1_0/fsp_util.h>
void main(FSP_INFO_HEADER *fsp_info_header);
diff --git a/src/southbridge/intel/i82801dx/smi.c b/src/southbridge/intel/i82801dx/smi.c
index 945fcf2db8..0ff813e1ae 100644
--- a/src/southbridge/intel/i82801dx/smi.c
+++ b/src/southbridge/intel/i82801dx/smi.c
@@ -20,7 +20,6 @@
#include <console/console.h>
#include <arch/acpi.h>
#include <arch/io.h>
-#include <cpu/cpu.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/smm.h>
#include <string.h>
diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c
index 6c8331f940..7dcec507a8 100644
--- a/src/southbridge/intel/i82801gx/lpc.c
+++ b/src/southbridge/intel/i82801gx/lpc.c
@@ -24,7 +24,6 @@
#include <arch/io.h>
#include <arch/ioapic.h>
#include <arch/acpi.h>
-#include <cpu/cpu.h>
#include "i82801gx.h"
#include <cpu/x86/smm.h>
#include <arch/acpigen.h>
diff --git a/src/southbridge/intel/i82801gx/smi.c b/src/southbridge/intel/i82801gx/smi.c
index 7355d117a4..8cfd511ae4 100644
--- a/src/southbridge/intel/i82801gx/smi.c
+++ b/src/southbridge/intel/i82801gx/smi.c
@@ -20,7 +20,6 @@
#include <console/console.h>
#include <arch/io.h>
#include <arch/acpi.h>
-#include <cpu/cpu.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/smm.h>
#include <string.h>
diff --git a/src/southbridge/intel/i82801ix/lpc.c b/src/southbridge/intel/i82801ix/lpc.c
index 18bfcf37a6..a69b8796ac 100644
--- a/src/southbridge/intel/i82801ix/lpc.c
+++ b/src/southbridge/intel/i82801ix/lpc.c
@@ -25,7 +25,6 @@
#include <arch/io.h>
#include <arch/ioapic.h>
#include <arch/acpi.h>
-#include <cpu/cpu.h>
#include <cpu/x86/smm.h>
#include <arch/acpigen.h>
#include <cbmem.h>
diff --git a/src/southbridge/intel/i82801ix/smi.c b/src/southbridge/intel/i82801ix/smi.c
index 2fa0c96659..9dc9a3b989 100644
--- a/src/southbridge/intel/i82801ix/smi.c
+++ b/src/southbridge/intel/i82801ix/smi.c
@@ -21,7 +21,6 @@
#include <console/console.h>
#include <arch/io.h>
#include <arch/acpi.h>
-#include <cpu/cpu.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/smm.h>
#include <string.h>
diff --git a/src/southbridge/intel/i82801jx/lpc.c b/src/southbridge/intel/i82801jx/lpc.c
index cd5e3078b0..ba79e73cff 100644
--- a/src/southbridge/intel/i82801jx/lpc.c
+++ b/src/southbridge/intel/i82801jx/lpc.c
@@ -25,7 +25,6 @@
#include <arch/io.h>
#include <arch/ioapic.h>
#include <arch/acpi.h>
-#include <cpu/cpu.h>
#include <cpu/x86/smm.h>
#include <arch/acpigen.h>
#include <arch/smp/mpspec.h>
diff --git a/src/southbridge/intel/i82801jx/smi.c b/src/southbridge/intel/i82801jx/smi.c
index 8d87291d68..76d4520165 100644
--- a/src/southbridge/intel/i82801jx/smi.c
+++ b/src/southbridge/intel/i82801jx/smi.c
@@ -21,7 +21,6 @@
#include <console/console.h>
#include <arch/io.h>
#include <arch/acpi.h>
-#include <cpu/cpu.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/smm.h>
#include <string.h>
diff --git a/src/southbridge/intel/ibexpeak/lpc.c b/src/southbridge/intel/ibexpeak/lpc.c
index b09951f493..e5cbc594ae 100644
--- a/src/southbridge/intel/ibexpeak/lpc.c
+++ b/src/southbridge/intel/ibexpeak/lpc.c
@@ -25,7 +25,7 @@
#include <arch/io.h>
#include <arch/ioapic.h>
#include <arch/acpi.h>
-#include <cpu/cpu.h>
+#include <arch/cpu.h>
#include <elog.h>
#include <arch/acpigen.h>
#include <drivers/intel/gma/i915.h>
diff --git a/src/southbridge/intel/ibexpeak/smi.c b/src/southbridge/intel/ibexpeak/smi.c
index 10e2fa627b..31736628b3 100644
--- a/src/southbridge/intel/ibexpeak/smi.c
+++ b/src/southbridge/intel/ibexpeak/smi.c
@@ -20,7 +20,6 @@
#include <device/pci.h>
#include <console/console.h>
#include <arch/io.h>
-#include <cpu/cpu.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/smm.h>
#include <string.h>
diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c
index 9e0ce8a09e..3b8644a96d 100644
--- a/src/southbridge/intel/lynxpoint/lpc.c
+++ b/src/southbridge/intel/lynxpoint/lpc.c
@@ -26,7 +26,7 @@
#include <arch/io.h>
#include <arch/ioapic.h>
#include <arch/acpi.h>
-#include <cpu/cpu.h>
+#include <arch/cpu.h>
#include <cpu/x86/smm.h>
#include <cbmem.h>
#include <string.h>
diff --git a/src/southbridge/intel/lynxpoint/smi.c b/src/southbridge/intel/lynxpoint/smi.c
index 386451f03e..5dab05c5cf 100644
--- a/src/southbridge/intel/lynxpoint/smi.c
+++ b/src/southbridge/intel/lynxpoint/smi.c
@@ -19,7 +19,6 @@
#include <device/pci.h>
#include <console/console.h>
#include <arch/io.h>
-#include <cpu/cpu.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/smm.h>
#include <string.h>